A simple Verilog example of a 4096pt FFT on analog input from a Nexys 4 XADC. The input is sampled at 1MSPS, oversampled to produce 14-bit samples at 62.5kHz, then sent to the FFT processing modules and passed through to PWM Audio out. The FFT outputs the magnitude for each frequency bin and a histogram of the frequency spectrum is output over VGA video

Nexys4FFTDemo-master
Nexys4FFTDemo-master\.gitignore
Nexys4FFTDemo-master\README.md
Nexys4FFTDemo-master\bin
Nexys4FFTDemo-master\bin\nexys4_fft_demo.bit
Nexys4FFTDemo-master\proj
Nexys4FFTDemo-master\proj\README.md
Nexys4FFTDemo-master\src
Nexys4FFTDemo-master\src\bd
Nexys4FFTDemo-master\src\bd\fft_mag
Nexys4FFTDemo-master\src\bd\fft_mag\fft_mag.bd
Nexys4FFTDemo-master\src\constraints
Nexys4FFTDemo-master\src\constraints\Nexys4DDR_Master.xdc
Nexys4FFTDemo-master\src\hdl
Nexys4FFTDemo-master\src\hdl\bram_to_fft.v
Nexys4FFTDemo-master\src\hdl\histogram.v
Nexys4FFTDemo-master\src\hdl\nexys4_fft_demo.v
Nexys4FFTDemo-master\src\hdl\oversampler.v
Nexys4FFTDemo-master\src\hdl\utils.v
Nexys4FFTDemo-master\src\ip
Nexys4FFTDemo-master\src\ip\bram_fft
Nexys4FFTDemo-master\src\ip\bram_fft\bram_fft.xci
Nexys4FFTDemo-master\src\ip\bram_frame
Nexys4FFTDemo-master\src\ip\bram_frame\bram_frame.xci
Nexys4FFTDemo-master\src\ip\clk_wiz_0
Nexys4FFTDemo-master\src\ip\clk_wiz_0\clk_wiz_0.xci
Nexys4FFTDemo-master\src\ip\xadc_demo
Nexys4FFTDemo-master\src\ip\xadc_demo\xadc_demo.xci

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