Using VHDL to write frequency division procedures, the chip is LATTICE

fenpin\.floorplanner.ini
fenpin\.ncd_editor.ini
fenpin\.run_manager.ini
fenpin\.setting.ini
fenpin\.spreadsheet_view.ini
fenpin\.spread_sheet.ini
fenpin\fenpin.ccl
fenpin\fenpin.ldf
fenpin\fenpin.lpf
fenpin\fenpin.vhd
fenpin\fenpin1.sty
fenpin\fenpin_tcl.html
fenpin\fenpin_tcr.dir\pn170616152249.tcr
fenpin\fenpin_tcr.dir\pn170616152713.tcr
fenpin\fenpin_tcr.dir\pn170616171445.tcr
fenpin\fenpin_tcr.dir\pn170616175642.tcr
fenpin\fenpin_tcr.dir\pn170620145308.tcr
fenpin\fenpin_tcr.dir\pn170624171948.tcr
fenpin\impl1\.build_status
fenpin\impl1\.vdbs\dbStat.txt
fenpin\impl1\.vdbs\fenpin_impl1_map.vdb
fenpin\impl1\.vdbs\fenpin_rtl.vdb
fenpin\impl1\.vdbs\fenpin_tech.vdb
fenpin\impl1\._Real_._Math_.vhd
fenpin\impl1\automake.log
fenpin\impl1\fenpin_drc.log
fenpin\impl1\fenpin_impl1.alt
fenpin\impl1\fenpin_impl1.arearep
fenpin\impl1\fenpin_impl1.bgn
fenpin\impl1\fenpin_impl1.dir\5_1.ncd
fenpin\impl1\fenpin_impl1.dir\5_1.pad
fenpin\impl1\fenpin_impl1.dir\5_1.par
fenpin\impl1\fenpin_impl1.dir\5_1_par.asd
fenpin\impl1\fenpin_impl1.dir\fenpin_impl1.par
fenpin\impl1\fenpin_impl1.drc
fenpin\impl1\fenpin_impl1.jed
fenpin\impl1\fenpin_impl1.log
fenpin\impl1\fenpin_impl1.lpf
fenpin\impl1\fenpin_impl1.lsedata
fenpin\impl1\fenpin_impl1.mrp
fenpin\impl1\fenpin_impl1.mt
fenpin\impl1\fenpin_impl1.ncd
fenpin\impl1\fenpin_impl1.ngd
fenpin\impl1\fenpin_impl1.p2t
fenpin\impl1\fenpin_impl1.p3t
fenpin\impl1\fenpin_impl1.pad
fenpin\impl1\fenpin_impl1.par
fenpin\impl1\fenpin_impl1.prf
fenpin\impl1\fenpin_impl1.pt
fenpin\impl1\fenpin_impl1.t2b
fenpin\impl1\fenpin_impl1.tw1
fenpin\impl1\fenpin_impl1_bgn.html
fenpin\impl1\fenpin_impl1_eco.html
fenpin\impl1\fenpin_impl1_lattice.synproj
fenpin\impl1\fenpin_impl1_map.asd
fenpin\impl1\fenpin_impl1_map.cam
fenpin\impl1\fenpin_impl1_map.hrr
fenpin\impl1\fenpin_impl1_map.ncd
fenpin\impl1\fenpin_impl1_mapvo.sdf
fenpin\impl1\fenpin_impl1_mapvo.vo
fenpin\impl1\fenpin_impl1_map_trce.asd
fenpin\impl1\fenpin_impl1_mrp.html
fenpin\impl1\fenpin_impl1_pad.html
fenpin\impl1\fenpin_impl1_par.html
fenpin\impl1\fenpin_impl1_summary.html
fenpin\impl1\fenpin_impl1_tw1.html
fenpin\impl1\fenpin_lse.twr
fenpin\impl1\fenpin_lse_lsetwr.html
fenpin\impl1\fenpin_prim.v
fenpin\impl1\hdla_gen_hierarchy.html
fenpin\impl1\impl1.xcf
fenpin\impl1\message.xml
fenpin\impl1\synthesis.log
fenpin\impl1\synthesis_lse.html
fenpin\impl1\xxx_lse_cp_file_list
fenpin\impl1\xxx_lse_sign_file
fenpin\promote.xml
fenpin\reportview.xml
fenpin\impl1\.vdbs
fenpin\impl1\fenpin_impl1.dir
fenpin\fenpin_tcr.dir
fenpin\impl1
fenpin

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