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VHDL-FPGA-Verilog
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Update : 2017-07-07
Size : 341kb
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三*****
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Introduction - If you have any usage issues, please Google them yourself
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Basys3 based simple digital clock, vivado development environment can be used for entry, function, timing and display module.
Packet file list
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Chapter16
Chapter16\seg_clock
Chapter16\seg_clock\seg_clock.qpf
Chapter16\seg_clock\seg_clock.qsf
Chapter16\seg_clock\db
Chapter16\seg_clock\db\seg_clock.db_info
Chapter16\seg_clock\db\seg_clock.sld_design_entry.sci
Chapter16\seg_clock\db\prev_cmp_seg_clock.map.qmsg
Chapter16\seg_clock\db\logic_util_heursitic.dat
Chapter16\seg_clock\db\prev_cmp_seg_clock.qmsg
Chapter16\seg_clock\db\prev_cmp_seg_clock.fit.qmsg
Chapter16\seg_clock\db\prev_cmp_seg_clock.asm.qmsg
Chapter16\seg_clock\db\prev_cmp_seg_clock.tan.qmsg
Chapter16\seg_clock\seg_clock.cdf
Chapter16\seg_clock\src
Chapter16\seg_clock\src\seg_clock_top.bdf
Chapter16\seg_clock\src\seg_display.v.bak
Chapter16\seg_clock\src\seg_display_ctrl.v
Chapter16\seg_clock\src\timer.v.bak
Chapter16\seg_clock\src\timer.v
Chapter16\seg_clock\src\p_clk_div.v.bak
Chapter16\seg_clock\src\p_clk_div.v
Chapter16\seg_clock\src\seg_display_ctrl.v.bak
Chapter16\seg_clock\src\seg_display.v
Chapter16\seg_clock\incremental_db
Chapter16\seg_clock\incremental_db\compiled_partitions
Chapter16\seg_clock\incremental_db\compiled_partitions\seg_clock.root_partition.cmp.dfp
Chapter16\seg_clock\incremental_db\compiled_partitions\seg_clock.root_partition.map.kpt
Chapter16\seg_clock\incremental_db\compiled_partitions\seg_clock.root_partition.map.dpi
Chapter16\seg_clock\incremental_db\compiled_partitions\seg_clock.root_partition.cmp.logdb
Chapter16\seg_clock\incremental_db\compiled_partitions\seg_clock.root_partition.cmp.kpt
Chapter16\seg_clock\incremental_db\compiled_partitions\seg_clock.db_info
Chapter16\seg_clock\incremental_db\README
Chapter16\seg_clock\p_clk_6_div.bsf
Chapter16\seg_clock\seg_clock.done
Chapter16\seg_clock\seg_display_ctrl.bsf
Chapter16\seg_clock\timer.bsf
Chapter16\seg_clock\seg_clock.map.summary
Chapter16\seg_clock\seg_clock.tan.summary
Chapter16\seg_clock\seg_clock.tan.rpt
Chapter16\seg_clock\seg_clock.dpf
Chapter16\seg_clock\seg_clock.flow.rpt
Chapter16\seg_clock\seg_clock.map.rpt
Chapter16\seg_clock\seg_clock.fit.rpt
Chapter16\seg_clock\seg_clock.asm.rpt
Chapter16\seg_clock\seg_clock.pin
Chapter16\seg_clock\seg_clock.fit.smsg
Chapter16\seg_clock\seg_clock.fit.summary
Chapter16\seg_clock\seg_clock.qws
Chapter16\seg_clock\seg_clock_assignment_defaults.qdf
Chapter16\seg_clock\seg_clock.sof
Chapter16\seg_clock\seg_clock.pof
Chapter16\seg_clock\p_clk_div.bsf
Chapter16\seg_clock_v1
Chapter16\seg_clock_v1\seg_clock.qpf
Chapter16\seg_clock_v1\seg_clock.qsf
Chapter16\seg_clock_v1\seg_clock.cdf
Chapter16\seg_clock_v1\p_clk_6_div.bsf
Chapter16\seg_clock_v1\seg_clock.done
Chapter16\seg_clock_v1\seg_display_ctrl.bsf
Chapter16\seg_clock_v1\timer.bsf
Chapter16\seg_clock_v1\seg_clock.map.summary
Chapter16\seg_clock_v1\seg_clock.tan.summary
Chapter16\seg_clock_v1\seg_clock.tan.rpt
Chapter16\seg_clock_v1\seg_clock.dpf
Chapter16\seg_clock_v1\seg_clock.flow.rpt
Chapter16\seg_clock_v1\seg_clock.map.rpt
Chapter16\seg_clock_v1\seg_clock.fit.rpt
Chapter16\seg_clock_v1\seg_clock.asm.rpt
Chapter16\seg_clock_v1\seg_clock.pin
Chapter16\seg_clock_v1\seg_clock.fit.smsg
Chapter16\seg_clock_v1\seg_clock.fit.summary
Chapter16\seg_clock_v1\seg_clock.qws
Chapter16\seg_clock_v1\seg_clock.sof
Chapter16\seg_clock_v1\seg_clock.pof
Chapter16\seg_clock_v1\p_clk_div.bsf
Chapter16\seg_clock_v1\incremental_db
Chapter16\seg_clock_v1\incremental_db\README
Chapter16\seg_clock_v1\incremental_db\compiled_partitions
Chapter16\seg_clock_v1\incremental_db\compiled_partitions\seg_clock.db_info
Chapter16\seg_clock_v1\incremental_db\compiled_partitions\seg_clock.root_partition.map.kpt
Chapter16\seg_clock_v1\incremental_db\compiled_partitions\seg_clock.root_partition.cmp.dfp
Chapter16\seg_clock_v1\incremental_db\compiled_partitions\seg_clock.root_partition.map.dpi
Chapter16\seg_clock_v1\incremental_db\compiled_partitions\seg_clock.root_partition.cmp.logdb
Chapter16\seg_clock_v1\incremental_db\compiled_partitions\seg_clock.root_partition.cmp.kpt
Chapter16\seg_clock_v1\src
Chapter16\seg_clock_v1\src\seg_clock_top.bdf
Chapter16\seg_clock_v1\src\p_clk_div.v.bak
Chapter16\seg_clock_v1\src\p_clk_div.v
Chapter16\seg_clock_v1\src\seg_display.v.bak
Chapter16\seg_clock_v1\src\seg_display.v
Chapter16\seg_clock_v1\src\seg_display_ctrl.v.bak
Chapter16\seg_clock_v1\src\seg_display_ctrl.v
Chapter16\seg_clock_v1\src\timer.v.bak
Chapter16\seg_clock_v1\src\timer.v
Chapter16\seg_clock_v1\db
Chapter16\seg_clock_v1\db\seg_clock.db_info
Chapter16\seg_clock_v1\db\seg_clock.sld_design_entry.sci
Chapter16\seg_clock_v1\db\logic_util_heursitic.dat
Chapter16\seg_clock_v1\db\prev_cmp_seg_clock.qmsg
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