DDS digital signal generator through FPGA, DDS digital signal generator, can produce sine wave, square wave, sawtooth wave, triangle wave

dds1\anjian.v
dds1\anjian.v.bak
dds1\changewave.v
dds1\changewave.v.bak
dds1\dac.v
dds1\dac.v.bak
dds1\db\.cmp.kpt
dds1\db\altsyncram_2v91.tdf
dds1\db\altsyncram_8m91.tdf
dds1\db\altsyncram_br91.tdf
dds1\db\altsyncram_h0a1.tdf
dds1\db\altsyncram_k5a1.tdf
dds1\db\altsyncram_lv14.tdf
dds1\db\altsyncram_mj91.tdf
dds1\db\altsyncram_nv14.tdf
dds1\db\altsyncram_po91.tdf
dds1\db\altsyncram_pv14.tdf
dds1\db\altsyncram_tv14.tdf
dds1\db\altsyncram_vp91.tdf
dds1\db\cmpr_efc.tdf
dds1\db\cmpr_hfc.tdf
dds1\db\cmpr_ifc.tdf
dds1\db\cntr_3fi.tdf
dds1\db\cntr_4fi.tdf
dds1\db\cntr_5fi.tdf
dds1\db\cntr_78j.tdf
dds1\db\cntr_7fi.tdf
dds1\db\cntr_8fi.tdf
dds1\db\cntr_d8j.tdf
dds1\db\cntr_p1j.tdf
dds1\db\cntr_v7j.tdf
dds1\db\dds.asm.qmsg
dds1\db\dds.asm.rdb
dds1\db\dds.asm_labs.ddb
dds1\db\dds.cbx.xml
dds1\db\dds.cmp.bpm
dds1\db\dds.cmp.cdb
dds1\db\dds.cmp.hdb
dds1\db\dds.cmp.idb
dds1\db\dds.cmp.logdb
dds1\db\dds.cmp.rdb
dds1\db\dds.cmp_merge.kpt
dds1\db\dds.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
dds1\db\dds.cuda_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
dds1\db\dds.db_info
dds1\db\dds.fit.qmsg
dds1\db\dds.hier_info
dds1\db\dds.hif
dds1\db\dds.ipinfo
dds1\db\dds.lpc.html
dds1\db\dds.lpc.rdb
dds1\db\dds.lpc.txt
dds1\db\dds.map.ammdb
dds1\db\dds.map.bpm
dds1\db\dds.map.cdb
dds1\db\dds.map.hdb
dds1\db\dds.map.kpt
dds1\db\dds.map.logdb
dds1\db\dds.map.qmsg
dds1\db\dds.map.rdb
dds1\db\dds.map_bb.cdb
dds1\db\dds.map_bb.hdb
dds1\db\dds.map_bb.logdb
dds1\db\dds.npp.qmsg
dds1\db\dds.pplq.rdb
dds1\db\dds.pre_map.hdb
dds1\db\dds.pti_db_list.ddb
dds1\db\dds.root_partition.map.reg_db.cdb
dds1\db\dds.routing.rdb
dds1\db\dds.rtlv.hdb
dds1\db\dds.rtlv_sg.cdb
dds1\db\dds.rtlv_sg_swap.cdb
dds1\db\dds.sgate.nvd
dds1\db\dds.sgate_sm.nvd
dds1\db\dds.sgdiff.cdb
dds1\db\dds.sgdiff.hdb
dds1\db\dds.sld_design_entry.sci
dds1\db\dds.sld_design_entry_dsc.sci
dds1\db\dds.smart_action.txt
dds1\db\dds.sta.qmsg
dds1\db\dds.sta.rdb
dds1\db\dds.sta_cmp.8_slow_1200mv_85c.tdb
dds1\db\dds.stingray_io_sim_cache.99um_ff_1200mv_0c_fast.hsd
dds1\db\dds.stingray_io_sim_cache.99um_tt_1200mv_0c_slow.hsd
dds1\db\dds.stingray_io_sim_cache.99um_tt_1200mv_85c_slow.hsd
dds1\db\dds.tiscmp.fastest_slow_1200mv_0c.ddb
dds1\db\dds.tiscmp.fastest_slow_1200mv_85c.ddb
dds1\db\dds.tiscmp.fast_1200mv_0c.ddb
dds1\db\dds.tiscmp.slow_1200mv_0c.ddb
dds1\db\dds.tiscmp.slow_1200mv_85c.ddb
dds1\db\dds.tis_db_list.ddb
dds1\db\dds.tmw_info
dds1\db\dds.vpr.ammdb
dds1\db\decode_4uf.tdf
dds1\db\logic_util_heursitic.dat
dds1\db\mux_grc.tdf
dds1\db\mux_irc.tdf
dds1\db\mux_krc.tdf
dds1\db\pll_1_altpll.v
dds1\db\pll_altpll.v

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