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VHDL-FPGA-Verilog
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top1
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VHDL-FPGA-Verilog
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Update : 2017-07-07
Size : 432kb
Downloaded :0次
Author :
Stel****
About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
Reedit
Seven segment digital decoder, 0~9 can display a total of 10 characters.
Packet file list
(Preview for download)
top1\test.v
top1\top.v
top1
db\logic_util_heursitic.dat
db\top.amm.cdb
db\top.asm.qmsg
db\top.asm.rdb
db\top.cbx.xml
db\top.cmp.bpm
db\top.cmp.cdb
db\top.cmp.hdb
db\top.cmp.kpt
db\top.cmp.logdb
db\top.cmp.rdb
db\top.cmp0.ddb
db\top.cmp1.ddb
db\top.cmp2.ddb
db\top.cmp_merge.kpt
db\top.db_info
db\top.fit.qmsg
db\top.hier_info
db\top.hif
db\top.idb.cdb
db\top.lpc.html
db\top.lpc.rdb
db\top.lpc.txt
db\top.map.bpm
db\top.map.cdb
db\top.map.hdb
db\top.map.kpt
db\top.map.logdb
db\top.map.qmsg
db\top.map_bb.cdb
db\top.map_bb.hdb
db\top.map_bb.logdb
db\top.pre_map.cdb
db\top.pre_map.hdb
db\top.rtlv.hdb
db\top.rtlv_sg.cdb
db\top.rtlv_sg_swap.cdb
db\top.sgdiff.cdb
db\top.sgdiff.hdb
db\top.sld_design_entry.sci
db\top.sld_design_entry_dsc.sci
db\top.smart_action.txt
db\top.sta.qmsg
db\top.sta.rdb
db\top.sta_cmp.8_slow.tdb
db\top.syn_hier_info
db\top.tis_db_list.ddb
db\top.tmw_info
incremental_db\compiled_partitions\top.db_info
incremental_db\compiled_partitions\top.root_partition.cmp.cdb
incremental_db\compiled_partitions\top.root_partition.cmp.dfp
incremental_db\compiled_partitions\top.root_partition.cmp.hdb
incremental_db\compiled_partitions\top.root_partition.cmp.kpt
incremental_db\compiled_partitions\top.root_partition.cmp.logdb
incremental_db\compiled_partitions\top.root_partition.cmp.rcfdb
incremental_db\compiled_partitions\top.root_partition.map.cdb
incremental_db\compiled_partitions\top.root_partition.map.dpi
incremental_db\compiled_partitions\top.root_partition.map.hbdb.cdb
incremental_db\compiled_partitions\top.root_partition.map.hbdb.hb_info
incremental_db\compiled_partitions\top.root_partition.map.hbdb.hdb
incremental_db\compiled_partitions\top.root_partition.map.hbdb.sig
incremental_db\compiled_partitions\top.root_partition.map.hdb
incremental_db\compiled_partitions\top.root_partition.map.kpt
incremental_db\README
work\t\verilog.prw
work\t\verilog.psm
work\t\_primary.dat
work\t\_primary.dbs
work\t\_primary.vhd
work\top\verilog.prw
work\top\verilog.psm
work\top\_primary.dat
work\top\_primary.dbs
work\top\_primary.vhd
work\_info
work\_temp\vlog4vxnzy
work\_temp\vlogcj755i
work\_temp\vlogs6g3si
work\_vmake
t.v
t.v.bak
test2.cr.mti
test2.mpf
top.asm.rpt
top.done
top.fit.rpt
top.fit.smsg
top.fit.summary
top.flow.rpt
top.map.rpt
top.map.summary
top.pin
top.qpf
top.qsf
top.sta.rpt
top.sta.summary
top.tcl
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