The FPGA kernel is used to generate SPWM waves, and the frequency is adjustable

SPWM\comp\comp\comp.cmd_log
SPWM\comp\comp\comp.gise
SPWM\comp\comp\comp.lso
SPWM\comp\comp\comp.ngc
SPWM\comp\comp\comp.ngr
SPWM\comp\comp\comp.prj
SPWM\comp\comp\comp.stx
SPWM\comp\comp\comp.syr
SPWM\comp\comp\comp.v
SPWM\comp\comp\comp.xise
SPWM\comp\comp\comp.xst
SPWM\comp\comp\comp_envsettings.html
SPWM\comp\comp\comp_summary.html
SPWM\comp\comp\comp_xst.xrpt
SPWM\comp\comp\iseconfig\comp.projectmgr
SPWM\comp\comp\iseconfig\comp.xreport
SPWM\comp\comp\webtalk_pn.xml
SPWM\comp\comp\xst\work\work.sdbl
SPWM\comp\comp\xst\work\work.sdbx
SPWM\comp\comp\_xmsgs\pn_parser.xmsgs
SPWM\comp\comp\_xmsgs\xst.xmsgs
SPWM\comp.cmd_log
SPWM\comp.lso
SPWM\comp.prj
SPWM\comp.spl
SPWM\comp.stx
SPWM\comp.sym
SPWM\comp.xst
SPWM\f_div\f_div.cmd_log
SPWM\f_div\f_div.lso
SPWM\f_div\f_div.prj
SPWM\f_div\f_div.spl
SPWM\f_div\f_div.stx
SPWM\f_div\f_div.sym
SPWM\f_div\f_div.v
SPWM\f_div\f_div.xst
SPWM\f_div.cmd_log
SPWM\f_div.lso
SPWM\f_div.prj
SPWM\f_div.spl
SPWM\f_div.stx
SPWM\f_div.sym
SPWM\f_div.xst
SPWM\ipcore_dir\coregen.cgp
SPWM\ipcore_dir\coregen.log
SPWM\ipcore_dir\create_SPWM_Sin_IP.tcl
SPWM\ipcore_dir\create_SPWM_Trang_IP.tcl
SPWM\ipcore_dir\SPWM_Sin_IP\blk_mem_gen_v7_3_readme.txt
SPWM\ipcore_dir\SPWM_Sin_IP\doc\blk_mem_gen_v7_3_vinfo.html
SPWM\ipcore_dir\SPWM_Sin_IP\doc\pg058-blk-mem-gen.pdf
SPWM\ipcore_dir\SPWM_Sin_IP\example_design\SPWM_Sin_IP_exdes.ucf
SPWM\ipcore_dir\SPWM_Sin_IP\example_design\SPWM_Sin_IP_exdes.vhd
SPWM\ipcore_dir\SPWM_Sin_IP\example_design\SPWM_Sin_IP_exdes.xdc
SPWM\ipcore_dir\SPWM_Sin_IP\example_design\SPWM_Sin_IP_prod.vhd
SPWM\ipcore_dir\SPWM_Sin_IP\implement\implement.bat
SPWM\ipcore_dir\SPWM_Sin_IP\implement\implement.sh
SPWM\ipcore_dir\SPWM_Sin_IP\implement\planAhead_ise.bat
SPWM\ipcore_dir\SPWM_Sin_IP\implement\planAhead_ise.sh
SPWM\ipcore_dir\SPWM_Sin_IP\implement\planAhead_ise.tcl
SPWM\ipcore_dir\SPWM_Sin_IP\implement\xst.prj
SPWM\ipcore_dir\SPWM_Sin_IP\implement\xst.scr
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\addr_gen.vhd
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\bmg_stim_gen.vhd
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\bmg_tb_pkg.vhd
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\functional\simcmds.tcl
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\functional\simulate_isim.bat
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\functional\simulate_mti.bat
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\functional\simulate_mti.do
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\functional\simulate_mti.sh
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\functional\simulate_ncsim.sh
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\functional\simulate_vcs.sh
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\functional\ucli_commands.key
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\functional\vcs_session.tcl
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\functional\wave_mti.do
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\functional\wave_ncsim.sv
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\random.vhd
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\SPWM_Sin_IP_synth.vhd
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\SPWM_Sin_IP_tb.vhd
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\timing\simcmds.tcl
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\timing\simulate_isim.bat
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\timing\simulate_mti.bat
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\timing\simulate_mti.do
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\timing\simulate_mti.sh
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\timing\simulate_ncsim.sh
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\timing\simulate_vcs.sh
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\timing\ucli_commands.key
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\timing\vcs_session.tcl
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\timing\wave_mti.do
SPWM\ipcore_dir\SPWM_Sin_IP\simulation\timing\wave_ncsim.sv
SPWM\ipcore_dir\SPWM_Sin_IP.asy
SPWM\ipcore_dir\SPWM_Sin_IP.gise
SPWM\ipcore_dir\SPWM_Sin_IP.mif
SPWM\ipcore_dir\SPWM_Sin_IP.ngc
SPWM\ipcore_dir\SPWM_Sin_IP.sym
SPWM\ipcore_dir\SPWM_Sin_IP.v
SPWM\ipcore_dir\SPWM_Sin_IP.veo
SPWM\ipcore_dir\SPWM_Sin_IP.xco
SPWM\ipcore_dir\SPWM_Sin_IP.xise
SPWM\ipcore_dir\SPWM_Sin_IP_flist.txt
SPWM\ipcore_dir\SPWM_Sin_IP_xmdf.tcl

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