it's an addler of four bits which is designed for the new designer of VHDL

adder\adder.asm.rpt
adder\adder.done
adder\adder.fit.rpt
adder\adder.fit.summary
adder\adder.flow.rpt
adder\adder.map.rpt
adder\adder.map.summary
adder\adder.pin
adder\adder.pof
adder\adder.qpf
adder\adder.qsf
adder\adder.qws
adder\adder.sim.rpt
adder\adder.tan.rpt
adder\adder.tan.summary
adder\adder.vhd
adder\adder.vhd.bak
adder\adder.vwf
adder\db\adder.asm.qmsg
adder\db\adder.cbx.xml
adder\db\adder.cmp.cdb
adder\db\adder.cmp.hdb
adder\db\adder.cmp.logdb
adder\db\adder.cmp.rdb
adder\db\adder.cmp.tdb
adder\db\adder.cmp0.ddb
adder\db\adder.db_info
adder\db\adder.eco.cdb
adder\db\adder.eds_overflow
adder\db\adder.fit.qmsg
adder\db\adder.hier_info
adder\db\adder.hif
adder\db\adder.map.cdb
adder\db\adder.map.hdb
adder\db\adder.map.logdb
adder\db\adder.map.qmsg
adder\db\adder.pre_map.cdb
adder\db\adder.pre_map.hdb
adder\db\adder.rtlv.hdb
adder\db\adder.rtlv_sg.cdb
adder\db\adder.rtlv_sg_swap.cdb
adder\db\adder.sgdiff.cdb
adder\db\adder.sgdiff.hdb
adder\db\adder.sim.cvwf
adder\db\adder.sim.hdb
adder\db\adder.sim.qmsg
adder\db\adder.sim.rdb
adder\db\adder.sld_design_entry.sci
adder\db\adder.sld_design_entry_dsc.sci
adder\db\adder.syn_hier_info
adder\db\adder.tan.qmsg
adder\db\adder.tis_db_list.ddb
adder\db\adder.tmw_info
adder\db\prev_cmp_adder.map.qmsg
adder\db\prev_cmp_adder.qmsg
adder\db\wed.wsf
adder\incremental_db\compiled_partitions\adder.root_partition.map.kpt
adder\incremental_db\README
adder\incremental_db\compiled_partitions
adder\db
adder\incremental_db
adder

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