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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-07-20
  • Size : 588kb
  • Downloaded :1次
  • Author :qazm****
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Introduction - If you have any usage issues, please Google them yourself
FPGA implements the RS (255239) encoding and decoding module
Packet file list
(Preview for download)
rs_code\design\decode.v
rs_code\design\inverse.v
rs_code\design\rsdec_berl.v
rs_code\design\rsdec_chien.v
rs_code\design\rsdec_syn.v
rs_code\design\rsencode.v
rs_code\design\sigin.v
rs_code\sim\rs_code.cr.mti
rs_code\sim\rs_code.mpf
rs_code\sim\test-bench.v
rs_code\sim\vsim.wlf
rs_code\sim\vsim_stacktrace.vstf
rs_code\sim\wave.vcd
rs_code\sim\work\_info
rs_code\sim\work\_lib.qdb
rs_code\sim\work\_lib1_1.qdb
rs_code\sim\work\_lib1_1.qpg
rs_code\sim\work\_lib1_2.qdb
rs_code\sim\work\_lib1_2.qpg
rs_code\sim\work\_vmake
rs_code\sim\work
rs_code\design
rs_code\sim
rs_code
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