Program with LED flashing circuit uses PLL IP and counter. And extinction rate is controled by key.

c5_pin_model_dump.txt
Chain1.cdf
cio_dump_disallowed_lists.echo
counter_bus_mux.bsf
counter_bus_mux.qip
counter_bus_mux.v
counter_bus_mux_bb.v
db
db\.cmp.kpt
db\logic_util_heursitic.dat
db\mux_omc.tdf
db\mux_sjc.tdf
db\prev_cmp_user_first_fpga.qmsg
db\user_first_fpga.asm.qmsg
db\user_first_fpga.asm.rdb
db\user_first_fpga.cmp.bpm
db\user_first_fpga.cmp.cdb
db\user_first_fpga.cmp.hdb
db\user_first_fpga.cmp.idb
db\user_first_fpga.cmp.logdb
db\user_first_fpga.cmp.rdb
db\user_first_fpga.cmp_merge.kpt
db\user_first_fpga.cyclonev_io_sim_cache.ff_0c_fast.hsd
db\user_first_fpga.cyclonev_io_sim_cache.ff_85c_fast.hsd
db\user_first_fpga.cyclonev_io_sim_cache.tt_0c_slow.hsd
db\user_first_fpga.cyclonev_io_sim_cache.tt_85c_slow.hsd
db\user_first_fpga.db_info
db\user_first_fpga.eda.qmsg
db\user_first_fpga.fit.qmsg
db\user_first_fpga.hier_info
db\user_first_fpga.hif
db\user_first_fpga.logic_util_heuristic.dat
db\user_first_fpga.lpc.html
db\user_first_fpga.lpc.rdb
db\user_first_fpga.lpc.txt
db\user_first_fpga.map.ammdb
db\user_first_fpga.map.bpm
db\user_first_fpga.map.cdb
db\user_first_fpga.map.hdb
db\user_first_fpga.map.kpt
db\user_first_fpga.map.logdb
db\user_first_fpga.map.qmsg
db\user_first_fpga.map.rdb
db\user_first_fpga.map_bb.cdb
db\user_first_fpga.map_bb.hdb
db\user_first_fpga.map_bb.logdb
db\user_first_fpga.pplq.rdb
db\user_first_fpga.pre_map.hdb
db\user_first_fpga.pti_db_list.ddb
db\user_first_fpga.root_partition.map.reg_db.cdb
db\user_first_fpga.routing.rdb
db\user_first_fpga.rtlv.hdb
db\user_first_fpga.rtlv_sg.cdb
db\user_first_fpga.rtlv_sg_swap.cdb
db\user_first_fpga.sld_design_entry.sci
db\user_first_fpga.sld_design_entry_dsc.sci
db\user_first_fpga.smart_action.txt
db\user_first_fpga.sta.qmsg
db\user_first_fpga.sta.rdb
db\user_first_fpga.sta_cmp.6_slow_1100mv_85c.tdb
db\user_first_fpga.tis_db_list.ddb
db\user_first_fpga.tiscmp.fast_1100mv_0c.ddb
db\user_first_fpga.tiscmp.fast_1100mv_85c.ddb
db\user_first_fpga.tiscmp.slow_1100mv_0c.ddb
db\user_first_fpga.tiscmp.slow_1100mv_85c.ddb
db\user_first_fpga.tmw_info
db\user_first_fpga.vpr.ammdb
greybox_tmp
greybox_tmp\cbx_args.txt
greybox_tmp\greybox_tmp
incremental_db
incremental_db\compiled_partitions
incremental_db\compiled_partitions\user_first_fpga.db_info
incremental_db\compiled_partitions\user_first_fpga.root_partition.cmp.ammdb
incremental_db\compiled_partitions\user_first_fpga.root_partition.cmp.cdb
incremental_db\compiled_partitions\user_first_fpga.root_partition.cmp.dfp
incremental_db\compiled_partitions\user_first_fpga.root_partition.cmp.hbdb.cdb
incremental_db\compiled_partitions\user_first_fpga.root_partition.cmp.hbdb.hdb
incremental_db\compiled_partitions\user_first_fpga.root_partition.cmp.hbdb.sig
incremental_db\compiled_partitions\user_first_fpga.root_partition.cmp.hdb
incremental_db\compiled_partitions\user_first_fpga.root_partition.cmp.kpt
incremental_db\compiled_partitions\user_first_fpga.root_partition.cmp.logdb
incremental_db\compiled_partitions\user_first_fpga.root_partition.cmp.rcfdb
incremental_db\compiled_partitions\user_first_fpga.root_partition.map.cdb
incremental_db\compiled_partitions\user_first_fpga.root_partition.map.dpi
incremental_db\compiled_partitions\user_first_fpga.root_partition.map.hbdb.cdb
incremental_db\compiled_partitions\user_first_fpga.root_partition.map.hbdb.hb_info
incremental_db\compiled_partitions\user_first_fpga.root_partition.map.hbdb.hdb
incremental_db\compiled_partitions\user_first_fpga.root_partition.map.hbdb.sig
incremental_db\compiled_partitions\user_first_fpga.root_partition.map.hdb
incremental_db\compiled_partitions\user_first_fpga.root_partition.map.kpt
incremental_db\compiled_partitions\user_first_fpga.rrp.hdb
incremental_db\compiled_partitions\user_first_fpga.rrs.cdb
incremental_db\README
output_files
output_files\Chain1.cdf
output_files\user_first_fpga.asm.rpt
output_files\user_first_fpga.done
output_files\user_first_fpga.eda.rpt
output_files\user_first_fpga.fit.rpt

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