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N25Q064A13E_VG12

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2017-07-24
  • Size : 133kb
  • Downloaded :0次
  • Author :harve******
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
This software code and all associated documentation, comments or other information (collectively "Software") is provided "AS IS" without warranty of any kind.
Packet file list
(Preview for download)
N25Q064A13E_VG12
N25Q064A13E_VG12\cds.lib
N25Q064A13E_VG12\code
N25Q064A13E_VG12\code\N25Qxxx.v
N25Q064A13E_VG12\doc
N25Q064A13E_VG12\hdl.var
N25Q064A13E_VG12\include
N25Q064A13E_VG12\include\.DevParam.h.swp
N25Q064A13E_VG12\include\.UserData.h.swp
N25Q064A13E_VG12\include\Decoders.h
N25Q064A13E_VG12\include\DevParam.h
N25Q064A13E_VG12\include\PLRSDetectors.h
N25Q064A13E_VG12\include\StackDecoder.h
N25Q064A13E_VG12\include\TimingData.h
N25Q064A13E_VG12\include\UserData.h
N25Q064A13E_VG12\path.txt
N25Q064A13E_VG12\readme.txt
N25Q064A13E_VG12\run_modelsim
N25Q064A13E_VG12\run_ncsim
N25Q064A13E_VG12\run_vcs
N25Q064A13E_VG12\sim
N25Q064A13E_VG12\sim\.restartSimSession.tcl.old
N25Q064A13E_VG12\sim\.simvision
N25Q064A13E_VG12\sim\.simvision\dbrowser-bookmarks
N25Q064A13E_VG12\sim\.simvision\schematic-bookmarks
N25Q064A13E_VG12\sim\.simvision\source-bookmarks
N25Q064A13E_VG12\sim\do.do
N25Q064A13E_VG12\sim\mem_Q064.vmf
N25Q064A13E_VG12\sim\modelsim.ini
N25Q064A13E_VG12\sim\session.inter.vpd.tcl
N25Q064A13E_VG12\sim\sfdp.vmf
N25Q064A13E_VG12\sim\vlog.opt
N25Q064A13E_VG12\sim\wave.do
N25Q064A13E_VG12\stim
N25Q064A13E_VG12\stim\dummy_prova.v
N25Q064A13E_VG12\stim\erase.v
N25Q064A13E_VG12\stim\lock1.v
N25Q064A13E_VG12\stim\lock2.v
N25Q064A13E_VG12\stim\otp.v
N25Q064A13E_VG12\stim\plrs_extended.v
N25Q064A13E_VG12\stim\plrs_extended_2nd_part_abort.v
N25Q064A13E_VG12\stim\plrs_xip_diofr.v
N25Q064A13E_VG12\stim\plrs_xip_dofr.v
N25Q064A13E_VG12\stim\plrs_xip_qiofr.v
N25Q064A13E_VG12\stim\plrs_xip_qiofr_aborted.v
N25Q064A13E_VG12\stim\plrs_xip_qiofr_aborted_bb.v
N25Q064A13E_VG12\stim\plrs_xip_qiofr_aborted_SHSLviolate.v
N25Q064A13E_VG12\stim\plrs_xip_qiofr_without_power_loss.v
N25Q064A13E_VG12\stim\plrs_xip_qofr.v
N25Q064A13E_VG12\stim\program.v
N25Q064A13E_VG12\stim\read.v
N25Q064A13E_VG12\stim\read_ogie.v
N25Q064A13E_VG12\stim\test_protocol.v
N25Q064A13E_VG12\stim\XIP_Numonyx.v
N25Q064A13E_VG12\top
N25Q064A13E_VG12\top\ClockGenerator.v
N25Q064A13E_VG12\top\StimGen_interface.h
N25Q064A13E_VG12\top\StimTasks.v
N25Q064A13E_VG12\top\Testbench.v
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