CY7C68013 firmware, FPGA test, Verilog

USB_CY7C68013_firmware_Verilog\readme.txt
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\build.bat
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop.c
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop.iic
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop.iic.bak
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop.lnp
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop.LST
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop.M51
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop.OBJ
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop.Opt
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop.plg
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop.__i
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop_Opt.Bak
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\bulkloop_Uv2.Bak
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\dscr.a51
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\dscr.LST
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\dscr.OBJ
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\dscr._ia
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\Ezusb.lib
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\EZWin2K.INF
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\firmware.c
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\fw.c
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\fw.LST
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\fw.OBJ
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\fw.__i
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\Fx2.h
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\fx2regs.h
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\fx2regs.inc
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\fx2sdly.h
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\hex2c.exe
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\readme.txt
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\syncdly.h
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\USBJmpTb.OBJ
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\usb_wr_in
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\usb_wr_in.hex
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\usb_wr_in.lnp
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\usb_wr_in.M51
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\usb_wr_in.Opt
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\usb_wr_in.plg
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\usb_wr_in.Uv2
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\usb_wr_in_Opt.Bak
USB_CY7C68013_firmware_Verilog\usb_wr_firmware\usb_wr_in_Uv2.Bak
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\read me.txt
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\transcript
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.asm.rpt
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.cdf
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.done
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.dpf
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.fit.smsg
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.fit.summary
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.flow.rpt
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.jdi
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.map.rpt
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.map.summary
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.merge.rpt
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.pin
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.qpf
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.qsf
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.qws
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.tan.summary
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.v
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog\USB_wr.v.bak
USB_CY7C68013_firmware_Verilog\usb_wr_firmware
USB_CY7C68013_firmware_Verilog\usb_wr_Verilog
USB_CY7C68013_firmware_Verilog

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