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sp6ex15
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VHDL-FPGA-Verilog
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Update : 2017-08-02
Size : 4.47mb
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Introduction - If you have any usage issues, please Google them yourself
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SRAM read and write test, a single byte SRAM read and write every second, using chipscope to observe the timing waveform
Packet file list
(Preview for download)
sp6ex15\counter.lso
sp6ex15\counter.prj
sp6ex15\counter.stx
sp6ex15\counter.xst
sp6ex15\ipcore_dir\chipscope_debug.cdc
sp6ex15\ipcore_dir\coregen.cgp
sp6ex15\ipcore_dir\coregen.log
sp6ex15\ipcore_dir\create_pll_controller.tcl
sp6ex15\ipcore_dir\edit_pll_controller.tcl
sp6ex15\ipcore_dir\pll_controller\clk_wiz_v3_6_readme.txt
sp6ex15\ipcore_dir\pll_controller\doc\clk_wiz_v3_6_readme.txt
sp6ex15\ipcore_dir\pll_controller\doc\clk_wiz_v3_6_vinfo.html
sp6ex15\ipcore_dir\pll_controller\doc\pg065_clk_wiz.pdf
sp6ex15\ipcore_dir\pll_controller\example_design\pll_controller_exdes.ucf
sp6ex15\ipcore_dir\pll_controller\example_design\pll_controller_exdes.v
sp6ex15\ipcore_dir\pll_controller\example_design\pll_controller_exdes.xdc
sp6ex15\ipcore_dir\pll_controller\implement\implement.bat
sp6ex15\ipcore_dir\pll_controller\implement\implement.sh
sp6ex15\ipcore_dir\pll_controller\implement\planAhead_ise.bat
sp6ex15\ipcore_dir\pll_controller\implement\planAhead_ise.sh
sp6ex15\ipcore_dir\pll_controller\implement\planAhead_ise.tcl
sp6ex15\ipcore_dir\pll_controller\implement\planAhead_rdn.bat
sp6ex15\ipcore_dir\pll_controller\implement\planAhead_rdn.sh
sp6ex15\ipcore_dir\pll_controller\implement\planAhead_rdn.tcl
sp6ex15\ipcore_dir\pll_controller\implement\xst.prj
sp6ex15\ipcore_dir\pll_controller\implement\xst.scr
sp6ex15\ipcore_dir\pll_controller\simulation\functional\simcmds.tcl
sp6ex15\ipcore_dir\pll_controller\simulation\functional\simulate_isim.bat
sp6ex15\ipcore_dir\pll_controller\simulation\functional\simulate_isim.sh
sp6ex15\ipcore_dir\pll_controller\simulation\functional\simulate_mti.bat
sp6ex15\ipcore_dir\pll_controller\simulation\functional\simulate_mti.do
sp6ex15\ipcore_dir\pll_controller\simulation\functional\simulate_mti.sh
sp6ex15\ipcore_dir\pll_controller\simulation\functional\simulate_ncsim.sh
sp6ex15\ipcore_dir\pll_controller\simulation\functional\simulate_vcs.sh
sp6ex15\ipcore_dir\pll_controller\simulation\functional\ucli_commands.key
sp6ex15\ipcore_dir\pll_controller\simulation\functional\vcs_session.tcl
sp6ex15\ipcore_dir\pll_controller\simulation\functional\wave.do
sp6ex15\ipcore_dir\pll_controller\simulation\functional\wave.sv
sp6ex15\ipcore_dir\pll_controller\simulation\pll_controller_tb.v
sp6ex15\ipcore_dir\pll_controller\simulation\timing\pll_controller_tb.v
sp6ex15\ipcore_dir\pll_controller\simulation\timing\sdf_cmd_file
sp6ex15\ipcore_dir\pll_controller\simulation\timing\simcmds.tcl
sp6ex15\ipcore_dir\pll_controller\simulation\timing\simulate_isim.sh
sp6ex15\ipcore_dir\pll_controller\simulation\timing\simulate_mti.bat
sp6ex15\ipcore_dir\pll_controller\simulation\timing\simulate_mti.do
sp6ex15\ipcore_dir\pll_controller\simulation\timing\simulate_mti.sh
sp6ex15\ipcore_dir\pll_controller\simulation\timing\simulate_ncsim.sh
sp6ex15\ipcore_dir\pll_controller\simulation\timing\simulate_vcs.sh
sp6ex15\ipcore_dir\pll_controller\simulation\timing\ucli_commands.key
sp6ex15\ipcore_dir\pll_controller\simulation\timing\vcs_session.tcl
sp6ex15\ipcore_dir\pll_controller\simulation\timing\wave.do
sp6ex15\ipcore_dir\pll_controller.asy
sp6ex15\ipcore_dir\pll_controller.gise
sp6ex15\ipcore_dir\pll_controller.ncf
sp6ex15\ipcore_dir\pll_controller.sym
sp6ex15\ipcore_dir\pll_controller.ucf
sp6ex15\ipcore_dir\pll_controller.v
sp6ex15\ipcore_dir\pll_controller.veo
sp6ex15\ipcore_dir\pll_controller.xco
sp6ex15\ipcore_dir\pll_controller.xdc
sp6ex15\ipcore_dir\pll_controller.xise
sp6ex15\ipcore_dir\pll_controller_flist.txt
sp6ex15\ipcore_dir\pll_controller_xmdf.tcl
sp6ex15\ipcore_dir\tmp\customization_gui.0.0535084526304.out
sp6ex15\ipcore_dir\tmp\customization_gui.0.27564817121.out
sp6ex15\ipcore_dir\tmp\_cg\_dbg\xil_331.in
sp6ex15\ipcore_dir\tmp\_cg\_dbg\xil_331.out
sp6ex15\ipcore_dir\tmp\_xmsgs\pn_parser.xmsgs
sp6ex15\ipcore_dir\_xmsgs\cg.xmsgs
sp6ex15\ipcore_dir\_xmsgs\pn_parser.xmsgs
sp6ex15\iseconfig\sp6.projectmgr
sp6ex15\iseconfig\sp6.xreport
sp6ex15\led_controller.lso
sp6ex15\led_controller.prj
sp6ex15\led_controller.stx
sp6ex15\led_controller.xst
sp6ex15\modelsim.ini
sp6ex15\pa.fromHdl.tcl
sp6ex15\par_usage_statistics.html
sp6ex15\planAhead_pid10348.debug
sp6ex15\planAhead_pid1052.debug
sp6ex15\planAhead_pid8104.debug
sp6ex15\planAhead_pid8904.debug
sp6ex15\planAhead_pid9948.debug
sp6ex15\planAhead_run_1\planAhead.jou
sp6ex15\planAhead_run_1\planAhead.log
sp6ex15\planAhead_run_1\planAhead_run.log
sp6ex15\planAhead_run_1\sp6.data\constrs_1\fileset.xml
sp6ex15\planAhead_run_1\sp6.data\sim_1\fileset.xml
sp6ex15\planAhead_run_1\sp6.data\sources_1\fileset.xml
sp6ex15\planAhead_run_1\sp6.data\wt\project.wpc
sp6ex15\planAhead_run_1\sp6.data\wt\webtalk_pa.xml
sp6ex15\planAhead_run_1\sp6.ppr
sp6ex15\planAhead_run_2\planAhead.jou
sp6ex15\planAhead_run_2\planAhead.log
sp6ex15\planAhead_run_2\planAhead_run.log
sp6ex15\planAhead_run_2\sp6.data\constrs_1\fileset.xml
sp6ex15\planAhead_run_2\sp6.data\sim_1\fileset.xml
sp6ex15\planAhead_run_2\sp6.data\sources_1\fileset.xml
sp6ex15\planAhead_run_2\sp6.data\wt\project.wpc
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