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axi_ipif_v2.3

  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-08-08
  • Size : 394kb
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  • Author :fores******
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Introduction - If you have any usage issues, please Google them yourself
The AXI4-Lite IP Interface (IPIF) is a part of the Xilinx family of Advanced RISC Machine (ARM) Advanced Microcontroller Bus Architecture (AMBA) Advanced eXtensible Interface (AXI) control interface compatible products. It provides a point-to-point bidirectional interface between a user Intellectual Property (IP) core and the AXI interconnect.
Packet file list
(Preview for download)
address_decoder.v
address_decoder.vhd
axi4_lite_ipif_wrapper.v
axi4_lite_ipif_wrapper.vhd
axi_lite_ipif.v
axi_lite_ipif.vhd
counter_f.v
counter_f.vhd
ipif_pkg.vhd
pselect_f.v
pselect_f.vhd
slave_attachment.v
slave_attachment.vhd
axi_lite_ipif_ds765.pdf
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