This code based on verilog language, worked on EP1C3T144 FPGA chip, developed on Quartus II 12.0 . The ccd's data transformed by USB2.0 after amplified and AD confromed.

CCD_drive
CCD_drive\FT245_rw.v
CCD_drive\FT245_rw.v.bak
CCD_drive\TLC1865_drive.bsf
CCD_drive\TLC1865_drive.v
CCD_drive\TLC1865_drive.v.bak
CCD_drive\ccd_drive.asm.rpt
CCD_drive\ccd_drive.bsf
CCD_drive\ccd_drive.done
CCD_drive\ccd_drive.eda.rpt
CCD_drive\ccd_drive.fit.rpt
CCD_drive\ccd_drive.fit.smsg
CCD_drive\ccd_drive.fit.summary
CCD_drive\ccd_drive.flow.rpt
CCD_drive\ccd_drive.jdi
CCD_drive\ccd_drive.map.rpt
CCD_drive\ccd_drive.map.smsg
CCD_drive\ccd_drive.map.summary
CCD_drive\ccd_drive.pin
CCD_drive\ccd_drive.pof
CCD_drive\ccd_drive.qpf
CCD_drive\ccd_drive.qsf
CCD_drive\ccd_drive.qws
CCD_drive\ccd_drive.sof
CCD_drive\ccd_drive.sta.rpt
CCD_drive\ccd_drive.sta.summary
CCD_drive\ccd_drive.v
CCD_drive\ccd_drive.v.bak
CCD_drive\ccd_drive_description.txt
CCD_drive\ccd_top.v
CCD_drive\ccd_top.v.bak
CCD_drive\clk_div25.bsf
CCD_drive\clk_div25.v
CCD_drive\clk_div25.v.bak
CCD_drive\clk_div2_5.ppf
CCD_drive\clk_div2_5.qip
CCD_drive\clk_div2_5.v
CCD_drive\clk_div2_5_bb.v
CCD_drive\clk_div2_5_syn.v
CCD_drive\db
CCD_drive\db\ccd_drive.amm.cdb
CCD_drive\db\ccd_drive.asm.qmsg
CCD_drive\db\ccd_drive.asm.rdb
CCD_drive\db\ccd_drive.cbx.xml
CCD_drive\db\ccd_drive.cmp.kpt
CCD_drive\db\ccd_drive.cmp.rdb
CCD_drive\db\ccd_drive.cmp0.ddb
CCD_drive\db\ccd_drive.cmp_merge.kpt
CCD_drive\db\ccd_drive.db_info
CCD_drive\db\ccd_drive.eda.qmsg
CCD_drive\db\ccd_drive.fit.qmsg
CCD_drive\db\ccd_drive.hier_info
CCD_drive\db\ccd_drive.hif
CCD_drive\db\ccd_drive.idb.cdb
CCD_drive\db\ccd_drive.lpc.html
CCD_drive\db\ccd_drive.lpc.rdb
CCD_drive\db\ccd_drive.lpc.txt
CCD_drive\db\ccd_drive.map.kpt
CCD_drive\db\ccd_drive.map.qmsg
CCD_drive\db\ccd_drive.map.rdb
CCD_drive\db\ccd_drive.map_bb.hdb
CCD_drive\db\ccd_drive.pre_map.cdb
CCD_drive\db\ccd_drive.pre_map.hdb
CCD_drive\db\ccd_drive.root_partition.map.reg_db.cdb
CCD_drive\db\ccd_drive.routing.rdb
CCD_drive\db\ccd_drive.rpp.qmsg
CCD_drive\db\ccd_drive.rtlv.hdb
CCD_drive\db\ccd_drive.rtlv_sg.cdb
CCD_drive\db\ccd_drive.rtlv_sg_swap.cdb
CCD_drive\db\ccd_drive.sgate.rvd
CCD_drive\db\ccd_drive.sgate_sm.rvd
CCD_drive\db\ccd_drive.sgdiff.cdb
CCD_drive\db\ccd_drive.sgdiff.hdb
CCD_drive\db\ccd_drive.sld_design_entry.sci
CCD_drive\db\ccd_drive.sld_design_entry_dsc.sci
CCD_drive\db\ccd_drive.smart_action.txt
CCD_drive\db\ccd_drive.sta.qmsg
CCD_drive\db\ccd_drive.sta.rdb
CCD_drive\db\ccd_drive.syn_hier_info
CCD_drive\db\ccd_drive.tis_db_list.ddb
CCD_drive\db\logic_util_heursitic.dat
CCD_drive\db\prev_cmp_ccd_drive.qmsg
CCD_drive\greybox_tmp
CCD_drive\greybox_tmp\clk_div2_5.eda.rpt
CCD_drive\greybox_tmp\clk_div2_5.flow.rpt
CCD_drive\greybox_tmp\clk_div2_5.map.rpt
CCD_drive\greybox_tmp\clk_div2_5.map.summary
CCD_drive\greybox_tmp\clk_div2_5.qpf
CCD_drive\greybox_tmp\clk_div2_5.qsf
CCD_drive\greybox_tmp\clk_div2_5.v
CCD_drive\greybox_tmp\db
CCD_drive\greybox_tmp\db\clk_div2_5.cbx.xml
CCD_drive\greybox_tmp\db\clk_div2_5.cmp.hdb
CCD_drive\greybox_tmp\db\clk_div2_5.cmp.rdb
CCD_drive\greybox_tmp\db\clk_div2_5.cmp_merge.kpt
CCD_drive\greybox_tmp\db\clk_div2_5.db_info
CCD_drive\greybox_tmp\db\clk_div2_5.eda.qmsg
CCD_drive\greybox_tmp\db\clk_div2_5.hier_info
CCD_drive\greybox_tmp\db\clk_div2_5.hif
CCD_drive\greybox_tmp\db\clk_div2_5.lpc.html

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