The source code of Chapter 15 of the Verilog Digital System Design Tutorial (Xia Yuwen) has been improved from the original 8 state to the 6 state, and the required function can be achieved. For a specific sequence in which the overlap occurs, detected.

sequence_detector(6-state)\sequence_detector.v
sequence_detector(6-state)\test_senquencedetector.v
sequence_detector(6-state)

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