To achieve three modes SPI master and slave module function design, data bit width 8bit, the maximum SPI clock frequency support 112MHz, using FSM design. Prepared by the pro test, used in Spartan6--45T series chips;

spi_MasterSlaver\rtl\spi_master.v
spi_MasterSlaver\rtl\spi_slave.v
spi_MasterSlaver\testbench\TB_SPI_MasSlv.v
spi_MasterSlaver\rtl
spi_MasterSlaver\testbench
spi_MasterSlaver

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