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LCD1602_UART

  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-10-14
  • Size : 33.85mb
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  • Author :WinT****
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Introduction - If you have any usage issues, please Google them yourself
kc705 1602 display module source code,and UART source code.addition to some design progress document.
Packet file list
(Preview for download)
LCD1602_UART\HD44780U.pdf
LCD1602_UART\LCD1602_UART说明文档.docx
LCD1602_UART\UART_BASESYSTEM\ip_upgrade.log
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\1166c939c64830be\1166c939c64830be.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\1166c939c64830be\u_ila_0_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\17c6fae885046e8c\17c6fae885046e8c.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\17c6fae885046e8c\u_ila_0_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\1caa4a7dd19681c9\1caa4a7dd19681c9.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\1caa4a7dd19681c9\u_ila_2_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\46305af8eefb36fe\46305af8eefb36fe.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\46305af8eefb36fe\u_ila_0_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\4b650d87e199bf2c\4b650d87e199bf2c.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\4b650d87e199bf2c\dbg_hub_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\4fec814611b4a2fa\4fec814611b4a2fa.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\4fec814611b4a2fa\u_ila_0_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\5fe062d360533978\5fe062d360533978.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\5fe062d360533978\u_ila_0_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\7840479f91da5a04\7840479f91da5a04.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\7840479f91da5a04\u_ila_1_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\7fd58608d014105f\7fd58608d014105f.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\7fd58608d014105f\u_ila_0_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\998c81fed96e18b8\998c81fed96e18b8.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\998c81fed96e18b8\u_ila_1_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\9b409d22945d55e0\9b409d22945d55e0.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\9b409d22945d55e0\u_ila_1_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\acec5bfb1433ad1e\acec5bfb1433ad1e.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\acec5bfb1433ad1e\u_ila_0_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\ae2047275900e046\ae2047275900e046.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\ae2047275900e046\u_ila_2_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\b347d797319ca71b\b347d797319ca71b.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\b347d797319ca71b\u_ila_1_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\d15c88ff7763c51d\d15c88ff7763c51d.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\d15c88ff7763c51d\dbg_hub_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\e54c87bc62adcb1c\e54c87bc62adcb1c.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\e54c87bc62adcb1c\u_ila_1_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\fc9cbf97ec05c49a\fc9cbf97ec05c49a.xci
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\ip\fc9cbf97ec05c49a\u_ila_1_CV.dcp
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\wt\java_command_handlers.wdf
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\wt\project.wpc
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\wt\synthesis.wdf
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\wt\synthesis_details.wdf
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\wt\webtalk_pa.xml
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.cache\wt\xsim.wdf
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.hw\hw_1\hw.xml
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.hw\hw_1\layout\hw_ila_1.layout
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.hw\hw_1\layout\hw_ila_2.layout
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.hw\hw_1\wave\hw_ila_data_1\hw_ila_data_1.wcfg
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.hw\hw_1\wave\hw_ila_data_1\hw_ila_data_1.wdb
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.hw\hw_1\wave\hw_ila_data_2\hw_ila_data_2.wcfg
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.hw\hw_1\wave\hw_ila_data_2\hw_ila_data_2.wdb
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.hw\hw_1\wave\hw_ila_data_3\hw_ila_data_3.wcfg
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.hw\hw_1\wave\hw_ila_data_3\hw_ila_data_3.wdb
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.hw\UART_BASESYSTEM.lpr
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\ip\clk_wiz_0\clk_wiz_0.veo
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\ipstatic\clk_wiz_v5_3_1\mmcm_pll_drp_func_7s_mmcm.vh
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\ipstatic\clk_wiz_v5_3_1\mmcm_pll_drp_func_7s_pll.vh
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\ipstatic\clk_wiz_v5_3_1\mmcm_pll_drp_func_us_mmcm.vh
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\ipstatic\clk_wiz_v5_3_1\mmcm_pll_drp_func_us_pll.vh
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\README.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\activehdl\clk_wiz_0.sh
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\activehdl\clk_wiz_0.udo
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\activehdl\compile.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\activehdl\file_info.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\activehdl\glbl.v
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\activehdl\README.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\activehdl\simulate.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\activehdl\wave.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\ies\clk_wiz_0.sh
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\ies\file_info.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\ies\glbl.v
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\ies\README.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\ies\run.f
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\modelsim\clk_wiz_0.sh
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\modelsim\clk_wiz_0.udo
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\modelsim\compile.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\modelsim\file_info.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\modelsim\glbl.v
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\modelsim\README.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\modelsim\simulate.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\modelsim\wave.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\questa\clk_wiz_0.sh
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\questa\clk_wiz_0.udo
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\questa\compile.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\questa\elaborate.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\questa\file_info.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\questa\glbl.v
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\questa\README.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\questa\simulate.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\questa\wave.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\README.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\riviera\clk_wiz_0.sh
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\riviera\clk_wiz_0.udo
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\riviera\compile.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\riviera\file_info.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\riviera\glbl.v
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\riviera\README.txt
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\riviera\simulate.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\riviera\wave.do
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\vcs\clk_wiz_0.sh
LCD1602_UART\UART_BASESYSTEM\UART_BASESYSTEM.ip_user_files\sim_scripts\clk_wiz_0\vcs\file_info.txt
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