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quartuswork

  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-10-31
  • Size : 2.51mb
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  • Author :芮****
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Introduction - If you have any usage issues, please Google them yourself
VHDL entry examples, a full adder and a half adder quartus9.1 program, can be run directly
Packet file list
(Preview for download)
newwork
newwork\count4.asm.rpt
newwork\count4.done
newwork\count4.dpf
newwork\count4.eda.rpt
newwork\count4.fit.rpt
newwork\count4.fit.smsg
newwork\count4.fit.summary
newwork\count4.flow.rpt
newwork\count4.map.rpt
newwork\count4.map.summary
newwork\count4.pin
newwork\count4.qpf
newwork\count4.qsf
newwork\count4.qws
newwork\count4.sim.rpt
newwork\count4.sta.rpt
newwork\count4.sta.summary
newwork\count4.vhd
newwork\count4.vwf
newwork\db
newwork\db\count4.asm.qmsg
newwork\db\count4.asm.rdb
newwork\db\count4.cbx.xml
newwork\db\count4.cmp.bpm
newwork\db\count4.cmp.cbp
newwork\db\count4.cmp.cdb
newwork\db\count4.cmp.ecobp
newwork\db\count4.cmp.hdb
newwork\db\count4.cmp.kpt
newwork\db\count4.cmp.logdb
newwork\db\count4.cmp.rdb
newwork\db\count4.cmp_merge.kpt
newwork\db\count4.constraints.sdc
newwork\db\count4.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
newwork\db\count4.cuda_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
newwork\db\count4.db_info
newwork\db\count4.eco.cdb
newwork\db\count4.eda.qmsg
newwork\db\count4.eds_overflow
newwork\db\count4.fit.qmsg
newwork\db\count4.fnsim.hdb
newwork\db\count4.fnsim.qmsg
newwork\db\count4.hier_info
newwork\db\count4.hif
newwork\db\count4.lpc.html
newwork\db\count4.lpc.rdb
newwork\db\count4.lpc.txt
newwork\db\count4.map.bpm
newwork\db\count4.map.cdb
newwork\db\count4.map.ecobp
newwork\db\count4.map.hdb
newwork\db\count4.map.kpt
newwork\db\count4.map.logdb
newwork\db\count4.map.qmsg
newwork\db\count4.map_bb.cdb
newwork\db\count4.map_bb.hdb
newwork\db\count4.map_bb.logdb
newwork\db\count4.pre_map.cdb
newwork\db\count4.pre_map.hdb
newwork\db\count4.rtlv.hdb
newwork\db\count4.rtlv_sg.cdb
newwork\db\count4.rtlv_sg_swap.cdb
newwork\db\count4.sgdiff.cdb
newwork\db\count4.sgdiff.hdb
newwork\db\count4.sim.cvwf
newwork\db\count4.sim.hdb
newwork\db\count4.sim.qmsg
newwork\db\count4.sim.rdb
newwork\db\count4.simfam
newwork\db\count4.sld_design_entry.sci
newwork\db\count4.sld_design_entry_dsc.sci
newwork\db\count4.smart_action.txt
newwork\db\count4.sta.qmsg
newwork\db\count4.sta.rdb
newwork\db\count4.sta_cmp.8_slow_1200mv_85c.tdb
newwork\db\count4.sta_col
newwork\db\count4.syn_hier_info
newwork\db\count4.tis_db_list.ddb
newwork\db\count4.tiscmp.fast_1200mv_0c.ddb
newwork\db\count4.tiscmp.fastest_slow_1200mv_0c.ddb
newwork\db\count4.tiscmp.fastest_slow_1200mv_85c.ddb
newwork\db\count4.tiscmp.slow_1200mv_0c.ddb
newwork\db\count4.tiscmp.slow_1200mv_85c.ddb
newwork\db\count4.tmw_info
newwork\db\logic_util_heursitic.dat
newwork\db\prev_cmp_count4.asm.qmsg
newwork\db\prev_cmp_count4.eda.qmsg
newwork\db\prev_cmp_count4.fit.qmsg
newwork\db\prev_cmp_count4.map.qmsg
newwork\db\prev_cmp_count4.qmsg
newwork\db\prev_cmp_count4.sim.qmsg
newwork\db\prev_cmp_count4.sta.qmsg
newwork\db\wed.wsf
newwork\incremental_db
newwork\incremental_db\README
newwork\incremental_db\compiled_partitions
newwork\incremental_db\compiled_partitions\count4.root_partition.cmp.cdb
newwork\incremental_db\compiled_partitions\count4.root_partition.cmp.dfp
newwork\incremental_db\compiled_partitions\count4.root_partition.cmp.hdb
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