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CPU_16bit
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Category :
VHDL-FPGA-Verilog
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Update : 2017-11-07
Size : 3.25mb
Downloaded :0次
Author :
sunr*****
About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
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A five section of the 16 bit CPU VHDL source code, can be integrated can also be simulated
Packet file list
(Preview for download)
CPU工程\.lso
CPU工程\ALU_module.bld
CPU工程\ALU_module.cmd_log
CPU工程\ALU_module.lso
CPU工程\ALU_module.ncd
CPU工程\ALU_module.ngc
CPU工程\ALU_module.ngd
CPU工程\ALU_module.ngr
CPU工程\ALU_module.par
CPU工程\ALU_module.pcf
CPU工程\ALU_module.prj
CPU工程\ALU_module.stx
CPU工程\ALU_module.syr
CPU工程\ALU_module.twr
CPU工程\ALU_module.twx
CPU工程\ALU_module.unroutes
CPU工程\ALU_module.vhd
CPU工程\ALU_module.xst
CPU工程\ALU_module_envsettings.html
CPU工程\ALU_module_guide.ncd
CPU工程\ALU_module_isim_beh.exe
CPU工程\ALU_module_map.map
CPU工程\ALU_module_map.mrp
CPU工程\ALU_module_map.ncd
CPU工程\ALU_module_map.ngm
CPU工程\ALU_module_pad.csv
CPU工程\ALU_module_pad.txt
CPU工程\ALU_module_stx_beh.prj
CPU工程\ALU_module_summary.html
CPU工程\ALU_module_tb.vhd
CPU工程\ALU_module_tb_isim_beh.exe
CPU工程\ALU_module_tb_stx_beh.prj
CPU工程\ALU_module_vhdl.prj
CPU工程\ALU_module_xst.xrpt
CPU工程\clk_module.bld
CPU工程\clk_module.cmd_log
CPU工程\clk_module.lso
CPU工程\clk_module.ncd
CPU工程\clk_module.ngc
CPU工程\clk_module.ngd
CPU工程\clk_module.ngr
CPU工程\clk_module.par
CPU工程\clk_module.pcf
CPU工程\clk_module.prj
CPU工程\clk_module.stx
CPU工程\clk_module.syr
CPU工程\clk_module.twr
CPU工程\clk_module.twx
CPU工程\clk_module.unroutes
CPU工程\clk_module.vhd
CPU工程\clk_module.xst
CPU工程\clk_module_envsettings.html
CPU工程\clk_module_guide.ncd
CPU工程\clk_module_map.map
CPU工程\clk_module_map.mrp
CPU工程\clk_module_map.ncd
CPU工程\clk_module_map.ngm
CPU工程\clk_module_pad.csv
CPU工程\clk_module_pad.txt
CPU工程\clk_module_summary.html
CPU工程\clk_module_tb.vhd
CPU工程\clk_module_tb_isim_beh.exe
CPU工程\clk_module_tb_stx_beh.prj
CPU工程\clk_module_vhdl.prj
CPU工程\clk_module_xst.xrpt
CPU工程\cpu.bgn
CPU工程\cpu.bit
CPU工程\CPU.bld
CPU工程\CPU.cmd_log
CPU工程\cpu.drc
CPU工程\CPU.lso
CPU工程\CPU.ncd
CPU工程\CPU.ngc
CPU工程\CPU.ngd
CPU工程\CPU.ngr
CPU工程\CPU.pad
CPU工程\CPU.par
CPU工程\CPU.pcf
CPU工程\CPU.prj
CPU工程\CPU.ptwx
CPU工程\CPU.stx
CPU工程\CPU.syr
CPU工程\CPU.twr
CPU工程\CPU.twx
CPU工程\CPU.unroutes
CPU工程\CPU.ut
CPU工程\CPU.vhd
CPU工程\CPU.xpi
CPU工程\CPU.xst
CPU工程\CPU_1st_edition.gise
CPU工程\CPU_1st_edition.xise
CPU工程\CPU_bitgen.xwbt
CPU工程\CPU_envsettings.html
CPU工程\CPU_guide.ncd
CPU工程\CPU_map.map
CPU工程\CPU_map.mrp
CPU工程\CPU_map.ncd
CPU工程\CPU_map.ngm
CPU工程\CPU_map.xrpt
CPU工程\cpu_new_tb.vhd
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