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jishi
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VHDL-FPGA-Verilog
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Update : 2017-11-14
Size : 31.04mb
Downloaded :0次
Author :
vss****
About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
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A calendar is designed with Verilog language, including leap year judgment, simulation is correct
Packet file list
(Preview for download)
jishi
jishi\db
jishi\db\.cmp.kpt
jishi\db\add_sub_1tc.tdf
jishi\db\add_sub_2tc.tdf
jishi\db\alt_u_div_8bf.tdf
jishi\db\alt_u_div_cbf.tdf
jishi\db\jishi.asm.qmsg
jishi\db\jishi.asm.rdb
jishi\db\jishi.asm_labs.ddb
jishi\db\jishi.cbx.xml
jishi\db\jishi.cmp.bpm
jishi\db\jishi.cmp.cdb
jishi\db\jishi.cmp.hdb
jishi\db\jishi.cmp.idb
jishi\db\jishi.cmp.logdb
jishi\db\jishi.cmp.rdb
jishi\db\jishi.cmp_merge.kpt
jishi\db\jishi.db_info
jishi\db\jishi.eda.qmsg
jishi\db\jishi.fit.qmsg
jishi\db\jishi.hier_info
jishi\db\jishi.hif
jishi\db\jishi.ipinfo
jishi\db\jishi.lpc.html
jishi\db\jishi.lpc.rdb
jishi\db\jishi.lpc.txt
jishi\db\jishi.map.ammdb
jishi\db\jishi.map.bpm
jishi\db\jishi.map.cdb
jishi\db\jishi.map.hdb
jishi\db\jishi.map.kpt
jishi\db\jishi.map.logdb
jishi\db\jishi.map.qmsg
jishi\db\jishi.map.rdb
jishi\db\jishi.map_bb.cdb
jishi\db\jishi.map_bb.hdb
jishi\db\jishi.map_bb.logdb
jishi\db\jishi.pre_map.hdb
jishi\db\jishi.pti_db_list.ddb
jishi\db\jishi.root_partition.map.reg_db.cdb
jishi\db\jishi.routing.rdb
jishi\db\jishi.rtlv.hdb
jishi\db\jishi.rtlv_sg.cdb
jishi\db\jishi.rtlv_sg_swap.cdb
jishi\db\jishi.sgdiff.cdb
jishi\db\jishi.sgdiff.hdb
jishi\db\jishi.sld_design_entry.sci
jishi\db\jishi.sld_design_entry_dsc.sci
jishi\db\jishi.smart_action.txt
jishi\db\jishi.smp_dump.txt
jishi\db\jishi.sta.qmsg
jishi\db\jishi.sta.rdb
jishi\db\jishi.sta_cmp.6_slow_1200mv_85c.tdb
jishi\db\jishi.stingray_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
jishi\db\jishi.stingray_io_sim_cache.45um_tt_1200mv_0c_slow.hsd
jishi\db\jishi.stingray_io_sim_cache.45um_tt_1200mv_85c_slow.hsd
jishi\db\jishi.tis_db_list.ddb
jishi\db\jishi.tiscmp.fast_1200mv_0c.ddb
jishi\db\jishi.tiscmp.slow_1200mv_0c.ddb
jishi\db\jishi.tiscmp.slow_1200mv_85c.ddb
jishi\db\jishi.vpr.ammdb
jishi\db\logic_util_heursitic.dat
jishi\db\lpm_divide_2fm.tdf
jishi\db\lpm_divide_4fm.tdf
jishi\db\prev_cmp_jishi.qmsg
jishi\db\sign_div_unsign_tlh.tdf
jishi\db\sign_div_unsign_vlh.tdf
jishi\incremental_db
jishi\incremental_db\README
jishi\incremental_db\compiled_partitions
jishi\incremental_db\compiled_partitions\jishi.db_info
jishi\incremental_db\compiled_partitions\jishi.root_partition.cmp.ammdb
jishi\incremental_db\compiled_partitions\jishi.root_partition.cmp.cdb
jishi\incremental_db\compiled_partitions\jishi.root_partition.cmp.dfp
jishi\incremental_db\compiled_partitions\jishi.root_partition.cmp.hdb
jishi\incremental_db\compiled_partitions\jishi.root_partition.cmp.logdb
jishi\incremental_db\compiled_partitions\jishi.root_partition.cmp.rcfdb
jishi\incremental_db\compiled_partitions\jishi.root_partition.map.cdb
jishi\incremental_db\compiled_partitions\jishi.root_partition.map.dpi
jishi\incremental_db\compiled_partitions\jishi.root_partition.map.hbdb.cdb
jishi\incremental_db\compiled_partitions\jishi.root_partition.map.hbdb.hb_info
jishi\incremental_db\compiled_partitions\jishi.root_partition.map.hbdb.hdb
jishi\incremental_db\compiled_partitions\jishi.root_partition.map.hbdb.sig
jishi\incremental_db\compiled_partitions\jishi.root_partition.map.hdb
jishi\incremental_db\compiled_partitions\jishi.root_partition.map.kpt
jishi\jishi.qpf
jishi\jishi.qsf
jishi\jishi.qws
jishi\jishi.v
jishi\jishi.v.bak
jishi\jishi_nativelink_simulation.rpt
jishi\output_files
jishi\output_files\jishi.asm.rpt
jishi\output_files\jishi.done
jishi\output_files\jishi.eda.rpt
jishi\output_files\jishi.fit.rpt
jishi\output_files\jishi.fit.smsg
jishi\output_files\jishi.fit.summary
jishi\output_files\jishi.flow.rpt
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