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ALU

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  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-11-16
  • Size : 41kb
  • Downloaded ：0次
  • Author ：muni*****
  • About ： Nobody
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Introduction - If you have any usage issues, please Google them yourself
this verilog code is alu. which is perform addition and sub,mul,div
Packet file list
(Preview for download)
FilenameSizeUpdate
ALU\run\alu.cr.mti 467 2017-10-23
ALU\run\alu.mpf 73615 2017-10-23
ALU\run\vsim.wlf 81920 2017-10-23
ALU\run\work\alu\verilog.asm 14832 2017-10-23
ALU\run\work\alu\verilog.rw 2615 2017-10-23
ALU\run\work\alu\_primary.dat 956 2017-10-23
ALU\run\work\alu\_primary.dbs 2455 2017-10-23
ALU\run\work\alu\_primary.vhd 925 2017-10-23
ALU\run\work\alu_tb\verilog.asm 20336 2017-10-23
ALU\run\work\alu_tb\verilog.rw 3937 2017-10-23
ALU\run\work\alu_tb\_primary.dat 1721 2017-10-23
ALU\run\work\alu_tb\_primary.dbs 4883 2017-10-23
ALU\run\work\alu_tb\_primary.vhd 443 2017-10-23
ALU\run\work\_info 962 2017-10-23
ALU\run\work\_temp\vlogbk2sr8 812 2017-10-23
ALU\run\work\_temp\vlogyvb5sg 812 2017-10-23
ALU\run\work\_vmake 26 2017-10-23
ALU\src\alu.v 1053 2017-10-23
ALU\src\alu.v~ 1488 2017-11-06
ALU\src\alu.v~~ 1488 2017-11-06
ALU\tb\alu_tb.v 1917 2017-11-06
ALU\tb\alu_tb.v~ 1841 2017-11-06
ALU\tb\dummy.v 54 2017-10-23
ALU\tb\dummy.v~
ALU\run\work\alu
ALU\run\work\alu_tb
ALU\run\work\_temp
ALU\run\work
ALU\run
ALU\src
ALU\tb
ALU
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