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crc_verilog_xilinx

  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-11-21
  • Size : 10kb
  • Downloaded :0次
  • Author :chri*****
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
Contains the following files readme.txt : This file crc8_8.v : CRC-8, 8-bit data input. crc12_4.v : CRC-12, 4-bit data input. crc16_8.v : CRC-16, 8-bit data input. crc_ccit_8.v : CRC-CCIT, 8-bit data input. crc32_8.v : CRC-32, 8-bit data input. crcgen.pl : Perl script used to generate Verilog Source for CRC caluculation.
Packet file list
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FilenameSizeUpdate
readme.txt 2383 2001-03-22
readme 2313 2001-03-22
crcgen.pl 10573 2001-03-22
crc8_8.v 3623 2001-03-22
crc32_8.v 6400 2001-03-22
crc16_8.v 4187 2001-03-22
crc12_4.v 3528 2001-03-22
crc_ccit_8.v 4063 2001-03-22
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