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VHDL-FPGA-Verilog
- Category : VHDL-FPGA-Verilog
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- Update : 2017-11-27
- Size : 2kb
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- Author ：y1a2*****
- About ： Nobody
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Introduction - If you have any usage issues, please Google them yourself
Through the FPGA, serial transmission data, and can support a variety of baud rates, using EP4CE22F17 chip implementation.
Packet file list
(Preview for download)
| Filename | Size | Update |
|---|---|---|
| uart_test | ||
| uart_test\db | ||
| uart_test\db\prev_cmp_uart_test.qmsg | 2193 | 2017-08-29 |
| uart_test\db\uart_test.db_info | 140 | 2017-08-29 |
| uart_test\db\uart_test.sld_design_entry.sci | 270 | 2017-08-28 |
| uart_test\uart_test.qws | 2403 | 2017-08-29 |
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