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FPGAstudy

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  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-12-12
  • Size : 7.07mb
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  • Author ：ww***
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CYCLONE V control the control of LED lamp
Packet file list
(Preview for download)
FilenameSizeUpdate
FPGAstudy\c5_pin_model_dump.txt 4875 2017-10-24
FPGAstudy\db\.cmp.kpt 202 2017-10-24
FPGAstudy\db\prev_cmp_test.qmsg 39466 2017-10-23
FPGAstudy\db\test.(0).cnf.cdb 953 2017-10-24
FPGAstudy\db\test.(0).cnf.hdb 680 2017-10-24
FPGAstudy\db\test.(1).cnf.cdb 740 2017-10-23
FPGAstudy\db\test.(1).cnf.hdb 482 2017-10-23
FPGAstudy\db\test.asm.qmsg 2806 2017-10-24
FPGAstudy\db\test.asm.rdb 812 2017-10-24
FPGAstudy\db\test.cbx.xml 86 2017-10-23
FPGAstudy\db\test.cmp.ammdb 341 2017-10-24
FPGAstudy\db\test.cmp.bpm 616 2017-10-24
FPGAstudy\db\test.cmp.cdb 53702 2017-10-24
FPGAstudy\db\test.cmp.hdb 116156 2017-10-24
FPGAstudy\db\test.cmp.idb 927 2017-10-24
FPGAstudy\db\test.cmp.logdb 8612 2017-10-24
FPGAstudy\db\test.cmp.rdb 26724 2017-10-24
FPGAstudy\db\test.cmp_merge.kpt 209 2017-10-24
FPGAstudy\db\test.cyclonev_io_sim_cache.ff_0c_fast.hsd 1518177 2017-10-24
FPGAstudy\db\test.cyclonev_io_sim_cache.ff_85c_fast.hsd 1520839 2017-10-24
FPGAstudy\db\test.cyclonev_io_sim_cache.tt_0c_slow.hsd 1518280 2017-10-24
FPGAstudy\db\test.cyclonev_io_sim_cache.tt_85c_slow.hsd 1510684 2017-10-24
FPGAstudy\db\test.db_info 144 2017-10-30
FPGAstudy\db\test.fit.qmsg 13080 2017-10-24
FPGAstudy\db\test.hier_info 338 2017-10-24
FPGAstudy\db\test.hif 388 2017-10-24
FPGAstudy\db\test.lpc.html 372 2017-10-24
FPGAstudy\db\test.lpc.rdb 409 2017-10-24
FPGAstudy\db\test.lpc.txt 1060 2017-10-24
FPGAstudy\db\test.map.ammdb 133 2017-10-24
FPGAstudy\db\test.map.bpm 577 2017-10-24
FPGAstudy\db\test.map.cdb 2250 2017-10-24
FPGAstudy\db\test.map.hdb 10282 2017-10-24
FPGAstudy\db\test.map.kpt 205 2017-10-24
FPGAstudy\db\test.map.logdb 4 2017-10-24
FPGAstudy\db\test.map.qmsg 5583 2017-10-24
FPGAstudy\db\test.map.rdb 1388 2017-10-24
FPGAstudy\db\test.map_bb.cdb 1854 2017-10-24
FPGAstudy\db\test.map_bb.hdb 9508 2017-10-24
FPGAstudy\db\test.map_bb.logdb 4 2017-10-24
FPGAstudy\db\test.pplq.rdb 301 2017-10-24
FPGAstudy\db\test.pre_map.hdb 10605 2017-10-24
FPGAstudy\db\test.root_partition.map.reg_db.cdb 222 2017-10-24
FPGAstudy\db\test.routing.rdb 23237 2017-10-24
FPGAstudy\db\test.rtlv.hdb 10515 2017-10-24
FPGAstudy\db\test.rtlv_sg.cdb 1134 2017-10-24
FPGAstudy\db\test.rtlv_sg_swap.cdb 594 2017-10-24
FPGAstudy\db\test.sld_design_entry.sci 227 2017-10-30
FPGAstudy\db\test.sld_design_entry_dsc.sci 227 2017-10-24
FPGAstudy\db\test.smart_action.txt 6 2017-10-24
FPGAstudy\db\test.sta.qmsg 15166 2017-10-24
FPGAstudy\db\test.sta.rdb 6096 2017-10-24
FPGAstudy\db\test.sta_cmp.6_slow_1100mv_85c.tdb 3216 2017-10-24
FPGAstudy\db\test.tiscmp.fast_1100mv_0c.ddb 220502 2017-10-24
FPGAstudy\db\test.tiscmp.fast_1100mv_85c.ddb 219180 2017-10-24
FPGAstudy\db\test.tiscmp.slow_1100mv_0c.ddb 222160 2017-10-24
FPGAstudy\db\test.tiscmp.slow_1100mv_85c.ddb 223167 2017-10-24
FPGAstudy\db\test.tis_db_list.ddb 301 2017-10-24
FPGAstudy\db\test.tmw_info 259 2017-10-30
FPGAstudy\db\test.vpr.ammdb 255 2017-10-24
FPGAstudy\db\test_partition_pins.json 443 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.db_info 144 2017-10-23
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.cmp.ammdb 341 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.cmp.cdb 52414 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.cmp.dfp 33 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.cmp.hbdb.cdb 1930 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.cmp.hbdb.hdb 9976 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.cmp.hbdb.sig 32 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.cmp.hdb 10122 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.cmp.logdb 4 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.cmp.rcfdb 1350 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.cdb 2057 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.dpi 847 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.hbdb.cdb 1452 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.hbdb.hb_info 46 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.hbdb.hdb 9554 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.hbdb.sig 32 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.hdb 9581 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.kpt 206 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.olf.cdb 244 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.olm.cdb 240 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.oln.cdb 749 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.opi 1 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.orf.cdb 244 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.orm.cdb 313 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.map.orn.cdb 957 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.rrp.cdb 2057 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.rrp.hbdb.cdb 1452 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.rrp.hbdb.hdb 9554 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.rrp.hdb 9581 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.root_partition.rrp.kpt 206 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.rrp.hdb 10756 2017-10-24
FPGAstudy\incremental_db\compiled_partitions\test.rrs.cdb 271 2017-10-24
FPGAstudy\incremental_db\README 653 2017-10-23
FPGAstudy\output_file.jic 16777443 2017-10-24
FPGAstudy\output_files\test.asm.rpt 4400 2017-10-24
FPGAstudy\output_files\test.done 26 2017-10-24
FPGAstudy\output_files\test.fit.rpt 246752 2017-10-24
FPGAstudy\output_files\test.fit.smsg 482 2017-10-24
FPGAstudy\output_files\test.fit.summary 669 2017-10-24
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