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ACCx42_AvalonST_Input

  • Category : VHDL-FPGA-Verilog
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  • Update : 2017-12-30
  • Size : 2kb
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  • Author :serg****
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Introduction - If you have any usage issues, please Google them yourself
This module does pipelined accumulate operation with 42 bit int value, usually used in dsp, Proved in Altera Stratix FPGA devices
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FilenameSizeUpdate
ACCx42_AvalonST_Input 0 2017-12-30
ACCx42_AvalonST_Input\ACCx14_CarryIn_CarryOut.v 1172 2010-04-16
ACCx42_AvalonST_Input\ACCx42_AvalonST_Input.v 2274 2010-04-16
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