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galateaPCIeGpio_final

  • Category : VHDL-FPGA-Verilog
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  • Update : 2018-01-12
  • Size : 1.61mb
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  • Author :HAMAYO*******
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Introduction - If you have any usage issues, please Google them yourself
Complete code of PCIe with test example
Packet file list
(Preview for download)
FilenameSizeUpdate
galateaPCIeGpio_final\bitstream\galateaPCIeGpio.mcs 4175300 2017-11-21
galateaPCIeGpio_final\constraints\xilinx_pcie_1_lane_ep_xc6slx45t-fgg484-3.ucf 11801 2017-12-19
galateaPCIeGpio_final\hdl\gtpa1_dual_wrapper.v 16439 2017-11-21
galateaPCIeGpio_final\hdl\gtpa1_dual_wrapper_tile.v 38494 2017-11-21
galateaPCIeGpio_final\hdl\PCIe.v 52667 2017-11-21
galateaPCIeGpio_final\hdl\pcie_app_s6.v 7977 2017-11-21
galateaPCIeGpio_final\hdl\pcie_brams_s6.v 8185 2017-11-21
galateaPCIeGpio_final\hdl\pcie_bram_s6.v 6099 2017-11-21
galateaPCIeGpio_final\hdl\pcie_bram_top_s6.v 5681 2017-11-21
galateaPCIeGpio_final\hdl\PIO.v 5849 2017-11-21
galateaPCIeGpio_final\hdl\PIO_32_RX_ENGINE.v 18903 2017-11-21
galateaPCIeGpio_final\hdl\PIO_32_TX_ENGINE.v 12292 2017-11-21
galateaPCIeGpio_final\hdl\PIO_EP.v 8190 2017-11-21
galateaPCIeGpio_final\hdl\PIO_EP_MEM.v 13276 2017-11-21
galateaPCIeGpio_final\hdl\PIO_EP_MEM_ACCESS.v 14729 2017-11-21
galateaPCIeGpio_final\hdl\PIO_TO_CTRL.v 3635 2017-11-21
galateaPCIeGpio_final\hdl\xilinx_pcie_1_1_ep_s6.v 18431 2017-12-19
galateaPCIeGpio_final\ise\final.cfi 518 2017-12-19
galateaPCIeGpio_final\ise\final.mcs 11606645 2017-12-19
galateaPCIeGpio_final\ise\final.prm 800 2017-12-19
galateaPCIeGpio_final\ise\Final_test_1.cfi 525 2017-12-04
galateaPCIeGpio_final\ise\Final_test_1.mcs 11606645 2017-12-04
galateaPCIeGpio_final\ise\Final_test_1.prm 814 2017-12-04
galateaPCIeGpio_final\ise\galateaPCIeGpio.gise 14669 2017-12-20
galateaPCIeGpio_final\ise\galateaPCIeGpio.xise 40770 2017-12-20
galateaPCIeGpio_final\ise\ipcore_dir\asdaf.xco 1403 2017-12-06
galateaPCIeGpio_final\ise\ipcore_dir\asdaf_flist.txt 98 2017-12-06
galateaPCIeGpio_final\ise\ipcore_dir\asdaf_readme.txt 717 2017-12-06
galateaPCIeGpio_final\ise\ipcore_dir\asdaf_xmdf.tcl 1822 2017-12-06
galateaPCIeGpio_final\ise\ipcore_dir\coregen.cgp 240 2017-12-06
galateaPCIeGpio_final\ise\ipcore_dir\coregen.log 771 2017-12-06
galateaPCIeGpio_final\ise\ipcore_dir\create_asdaf.tcl 1272 2017-12-06
galateaPCIeGpio_final\ise\ipcore_dir\_xmsgs\cg.xmsgs 911 2017-12-06
galateaPCIeGpio_final\ise\iseconfig\galateaPCIeGpio.projectmgr 7814 2017-12-20
galateaPCIeGpio_final\ise\iseconfig\xilinx_pcie_1_1_ep_s6.xreport 21226 2017-12-20
galateaPCIeGpio_final\ise\led_blink.cmd_log 297 2017-12-20
galateaPCIeGpio_final\ise\led_blink.lso 6 2017-12-20
galateaPCIeGpio_final\ise\led_blink.prj 28 2017-12-20
galateaPCIeGpio_final\ise\led_blink.stx 1784 2017-12-20
galateaPCIeGpio_final\ise\led_blink.tfi 133 2017-12-20
galateaPCIeGpio_final\ise\led_blink.v 685 2017-12-20
galateaPCIeGpio_final\ise\led_blink.xst 1193 2017-12-20
galateaPCIeGpio_final\ise\pa.fromNetlist.tcl 942 2017-12-04
galateaPCIeGpio_final\ise\par_usage_statistics.html 4153 2017-12-19
galateaPCIeGpio_final\ise\PCIe.lso 6 2017-12-20
galateaPCIeGpio_final\ise\PCIe.prj 242 2017-12-20
galateaPCIeGpio_final\ise\PCIe.stx 2568 2017-12-20
galateaPCIeGpio_final\ise\PCIe.xst 1183 2017-12-20
galateaPCIeGpio_final\ise\planAhead.ngc2edif.log 4284 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\galateaPCIeGpio.data\cache\xilinx_pcie_1_1_ep_s6_ngc_5ffe3c64.edif 1378062 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\galateaPCIeGpio.data\constrs_1\fileset.xml 690 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\galateaPCIeGpio.data\runs\impl_1.psg 422 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\galateaPCIeGpio.data\runs\runs.xml 260 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\galateaPCIeGpio.data\sources_1\fileset.xml 712 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\galateaPCIeGpio.data\wt\java_command_handlers.wdf 154 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\galateaPCIeGpio.data\wt\project.wpc 105 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\galateaPCIeGpio.data\wt\webtalk_pa.xml 1357 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\galateaPCIeGpio.ppr 972 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\planAhead.jou 586 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\planAhead.log 5160 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_1\planAhead_run.log 4906 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_2\galateaPCIeGpio.data\cache\xilinx_pcie_1_1_ep_s6_ngc_5ffe3c64.edif 1378062 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_2\galateaPCIeGpio.data\constrs_1\fileset.xml 690 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_2\galateaPCIeGpio.data\runs\impl_1.psg 422 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_2\galateaPCIeGpio.data\runs\runs.xml 260 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_2\galateaPCIeGpio.data\sources_1\fileset.xml 712 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_2\galateaPCIeGpio.data\wt\project.wpc 105 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_2\galateaPCIeGpio.data\wt\webtalk_pa.xml 1249 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_2\galateaPCIeGpio.ppr 972 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_2\planAhead.jou 657 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_2\planAhead.log 5538 2017-12-04
galateaPCIeGpio_final\ise\planAhead_run_2\planAhead_run.log 5288 2017-12-04
galateaPCIeGpio_final\ise\Untitled.cfi 521 2017-12-04
galateaPCIeGpio_final\ise\Untitled.mcs 11606645 2017-12-04
galateaPCIeGpio_final\ise\Untitled.prm 806 2017-12-04
galateaPCIeGpio_final\ise\usage_statistics_webtalk.html 201129 2017-12-19
galateaPCIeGpio_final\ise\webtalk.log 724 2017-12-19
galateaPCIeGpio_final\ise\webtalk_pn.xml 3034 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.bgn 6707 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.bit 4220321 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.bld 8198 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.cmd_log 13383 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.drc 216 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.lso 6 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.ncd 333638 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.ngc 359455 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.ngd 524289 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.ngr 605513 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.pad 21186 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.par 13149 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.pcf 25966 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.prj 587 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.ptwx 20144 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.stx 0 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.syr 67895 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.twr 52196 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.twx 68566 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.unroutes 157 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.ut 569 2017-12-19
galateaPCIeGpio_final\ise\xilinx_pcie_1_1_ep_s6.xpi 46 2017-12-19
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