Introduction - If you have any usage issues, please Google them yourself
Baud rate generator, a FPGA-based source code, after testing and debugging can be used, so upload to share.
Packet : 91331973vhdl.rar filelist
VHDL
VHDL\baud.vhd
VHDL\reciever.vhd
VHDL\top.vhd
VHDL\transfer.vhd