_uart_test2 data transmitted from FPGA to PC using

Introduction - If you have any usage issues, please Google them yourself

data transmitted from FPGA to PC using COM PORT version 2

Packet file list

(Preview for download)

Filename	Size	Update
_uart_test2\uart\BaudTickGen.v	841	2018-02-22
_uart_test2\uart\debounce.v	364	2018-02-19
_uart_test2\uart\debounce.v.bak	371	2018-02-19
_uart_test2\uart\uart_rx.v	2633	2018-02-22
_uart_test2\uart\uart_rx.v.bak	0	2018-02-14
_uart_test2\uart\uart_rx_top.v	988	2018-02-22
_uart_test2\uart\uart_rx_top.v.bak	0	2018-02-14
_uart_test2\uart\uart_tx.v	1230	2018-02-21
_uart_test2\uart\uart_tx.v.bak	132	2018-02-14
_uart_test2\uart\uart_tx_top.v	1414	2018-02-21
_uart_test2\uart\uart_tx_top.v.bak	85	2018-02-14
_uart_test2\uart_test2.qpf	1418	2018-02-14
_uart_test2\uart_test2.qsf	29736	2018-02-23
_uart_test2\uart_test2.v	2755	2018-02-23
_uart_test2\uart	0	2018-02-22
_uart_test2	0	2018-02-23

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