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clocking

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2018-03-07
  • Size : 77kb
  • Downloaded :0次
  • Author :小李***
  • About : Nobody
  • PS : If download it fails, try it again. Download again for free!
Introduction - If you have any usage issues, please Google them yourself
Good clock interface program for clock - driven programs for developers to use.
Packet file list
(Preview for download)
FilenameSizeUpdate
clocking\cores\.lso 18 2011-01-05
clocking\cores\blk_mem.v 5085 2011-01-05
clocking\cores\blk_mem.xco 2708 2011-01-05
clocking\cores\clka_mmcm.v 5496 2011-02-17
clocking\cores\clka_mmcm.xco 6779 2011-02-17
clocking\cores\clk_dcm.v 5594 2011-03-24
clocking\cores\clk_dcm.xco 6799 2011-03-24
clocking\cores\clk_mmcm.v 6901 2011-03-20
clocking\cores\clk_mmcm.xco 6799 2011-03-20
clocking\cores\coregen.cgp 532 2011-03-24
clocking\rtl\clock_dcm.v 1232 2011-03-24
clocking\rtl\clock_inference.v 959 2011-03-20
clocking\rtl\clock_mmcm.v 1236 2011-03-20
clocking\rtl\clock_schemes.v 1639 2011-03-19
clocking\rtl\timing_analyzer.v 2051 2011-02-17
clocking\synth\clock_dcm.lso 6 2011-03-24
clocking\synth\clock_dcm.ptwx 17614 2011-03-24
clocking\synth\clock_dcm.stx 0 2011-03-24
clocking\synth\clock_dcm.ucf 140 2011-03-24
clocking\synth\clock_dcm.unroutes 154 2011-03-24
clocking\synth\clock_dcm.xpi 46 2011-03-24
clocking\synth\clock_dcm_map.mrp 7794 2011-03-24
clocking\synth\clock_inference.ptwx 16555 2011-03-20
clocking\synth\clock_inference.ucf 737 2011-03-21
clocking\synth\clock_inference.unroutes 154 2011-03-20
clocking\synth\clock_inference.xpi 46 2011-03-20
clocking\synth\clock_inference_map.mrp 7535 2011-03-20
clocking\synth\clock_mmcm.clk_rgn 2373 2011-03-21
clocking\synth\clock_mmcm.dly 6093 2011-03-21
clocking\synth\clock_mmcm.lso 6 2011-03-20
clocking\synth\clock_mmcm.ptwx 18001 2011-03-21
clocking\synth\clock_mmcm.pwr 10097 2011-03-21
clocking\synth\clock_mmcm.stx 0 2011-03-20
clocking\synth\clock_mmcm.unroutes 154 2011-03-21
clocking\synth\clock_mmcm.xpi 46 2011-03-21
clocking\synth\clock_mmcm_map.mrp 9421 2011-03-21
clocking\synth\netgen\par\clock_mmcm_timesim.sdf 352300 2011-03-21
clocking\synth\netgen\par\clock_mmcm_timesim.v 658167 2011-03-21
clocking\synth\planAhead_run_1\synth.ppr 277 2011-03-21
clocking\synth\synth.xise 8951 2011-03-24
clocking\synth\timing_analyzer.ptwx 19405 2011-02-17
clocking\synth\timing_analyzer.ucf 433 2011-02-17
clocking\synth\timing_analyzer.unroutes 154 2011-02-17
clocking\synth\timing_analyzer.xpi 45 2011-02-17
clocking\synth\timing_analyzer_map.mrp 22199 2011-02-17
clocking\synth\planAhead_run_1\synth.data\constrs_1 0 2011-04-30
clocking\synth\planAhead_run_1\synth.data\runs 0 2011-04-30
clocking\synth\planAhead_run_1\synth.data\sources_1 0 2011-04-30
clocking\synth\planAhead_run_1\synth.data\wt 0 2011-04-30
clocking\synth\netgen\par 0 2011-04-30
clocking\synth\planAhead_run_1\synth.data 0 2011-04-30
clocking\synth\netgen 0 2011-04-30
clocking\synth\planAhead_run_1 0 2011-04-30
clocking\cores 0 2011-04-30
clocking\rtl 0 2011-04-30
clocking\synth 0 2011-04-30
clocking 0 2011-04-30
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