In the FPGA:Spartan-3E development board series, XC3S500E, package: FGT320, speed -4, using Xilinx ISE software, written in a reversible counter by using VHDL software, including experimental description and code to achieve the VHDL.doc file, the UCF pin binding file

Filename	Size	Update
可逆计数器VHDL描述	0	2018-03-09
可逆计数器VHDL描述\VHDL.doc	33280	2018-03-09
可逆计数器VHDL描述\时序逻辑电路实验.doc	36864	2018-03-09

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