In the FPGA:Spartan-3E development board series, XC3S500E, package: FGT320, speed -4, using Xilinx ISE software, write the debounce circuit by using VHDL software, including experimental description and code to achieve the VHDL.doc file, the UCF pin binding file

Filename	Size	Update
按键去抖电路VHDL描述	0	2018-03-09
按键去抖电路VHDL描述\VHDL代码与ucf文件.doc	35840	2018-03-09
按键去抖电路VHDL描述\状态机电路实验.doc	50854	2018-03-09

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