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Verilog_m_lx

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2018-03-28
  • Size : 48kb
  • Downloaded :0次
  • Author :bangban*******
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
A simple Verilog small program, suitable for beginners to learn
Packet file list
(Preview for download)
FilenameSizeUpdate
Verilog_m_lx\myadder 399 2018-03-27
Verilog_m_lx\myadder.bak 398 2018-03-27
Verilog_m_lx\myadder_tb 356 2018-03-27
Verilog_m_lx\myadder_tb.bak 347 2018-03-27
Verilog_m_lx\tcl_stacktrace.txt 911 2018-03-27
Verilog_m_lx\transcript 49 2018-03-27
Verilog_m_lx\Verilog_m_lx.cr.mti 545 2018-03-27
Verilog_m_lx\Verilog_m_lx.mpf 93712 2018-03-27
Verilog_m_lx\vsim.wlf 49152 2018-03-27
Verilog_m_lx\work\@_opt\_lib.qdb 49152 2018-03-27
Verilog_m_lx\work\@_opt\_lib1_0.qdb 32768 2018-03-27
Verilog_m_lx\work\@_opt\_lib1_0.qpg 0 2018-03-27
Verilog_m_lx\work\@_opt\_lib1_0.qtl 3436 2018-03-27
Verilog_m_lx\work\@_opt\_lib2_0.qdb 32768 2018-03-27
Verilog_m_lx\work\@_opt\_lib2_0.qpg 0 2018-03-27
Verilog_m_lx\work\@_opt\_lib2_0.qtl 1503 2018-03-27
Verilog_m_lx\work\@_opt\_lib3_0.qdb 32768 2018-03-27
Verilog_m_lx\work\@_opt\_lib3_0.qpg 0 2018-03-27
Verilog_m_lx\work\@_opt\_lib3_0.qtl 1651 2018-03-27
Verilog_m_lx\work\@_opt\_lib4_0.qdb 32768 2018-03-27
Verilog_m_lx\work\@_opt\_lib4_0.qpg 16384 2018-03-27
Verilog_m_lx\work\@_opt\_lib4_0.qtl 11258 2018-03-27
Verilog_m_lx\work\_info 1213 2018-03-27
Verilog_m_lx\work\_lib.qdb 49152 2018-03-27
Verilog_m_lx\work\_lib1_0.qdb 32768 2018-03-27
Verilog_m_lx\work\_lib1_0.qpg 0 2018-03-27
Verilog_m_lx\work\_lib1_0.qtl 9091 2018-03-27
Verilog_m_lx\work\_vmake 29 2018-03-27
Verilog_m_lx\work\@_opt 0 2018-03-27
Verilog_m_lx\work\_temp 0 2018-03-27
Verilog_m_lx\work\_tempmsg 0 2018-03-27
Verilog_m_lx\work 0 2018-03-27
Verilog_m_lx 0 2018-03-27
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