An adder tree is used to design the 8 bit multiplier, which has a pipelined 7 order FIR filter. The input sequence signal is 4 bits, and it is an unsigned number.

Filename	Size	Update
FIR	0	2018-04-03
FIR\add_tree.v	1204	2018-03-24
FIR\FIR8.v	1363	2018-03-24

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