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10_100m_ethernet-fifo_convertor

  • Category : VHDL-FPGA-Verilog
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  • Update : 2018-05-17
  • Size : 482kb
  • Downloaded :1次
  • Author :二****
  • About : Nobody
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10_100m_ethernet-fifo_convertor
Packet file list
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FilenameSizeUpdate
10_100m_ethernet-fifo_convertor 0 2018-03-07
10_100m_ethernet-fifo_convertor\doc 0 2018-03-07
10_100m_ethernet-fifo_convertor\doc\10_100M_Ethernet-FIFO_Convertor.pdf 563926 2009-12-14
10_100m_ethernet-fifo_convertor\testbench 0 2018-03-07
10_100m_ethernet-fifo_convertor\testbench\wavefile 0 2018-03-07
10_100m_ethernet-fifo_convertor\testbench\wavefile\CRC_Module.vwf 61437 2009-12-14
10_100m_ethernet-fifo_convertor\testbench\wavefile\InitModule.vwf 6477 2009-12-14
10_100m_ethernet-fifo_convertor\verilog 0 2018-03-07
10_100m_ethernet-fifo_convertor\verilog\common.v 1531 2009-12-14
10_100m_ethernet-fifo_convertor\verilog\concise.cpp 4632 2009-12-14
10_100m_ethernet-fifo_convertor\verilog\CRC_Module.v 3087 2009-12-14
10_100m_ethernet-fifo_convertor\verilog\Ethernet.fit.summary 620 2009-12-14
10_100m_ethernet-fifo_convertor\verilog\EthernetModule.v 2929 2009-12-14
10_100m_ethernet-fifo_convertor\verilog\InitModule.v 825 2009-12-14
10_100m_ethernet-fifo_convertor\verilog\Readme_important!!!!!.txt 942 2013-02-15
10_100m_ethernet-fifo_convertor\verilog\RxModule.v 9164 2009-12-14
10_100m_ethernet-fifo_convertor\verilog\test_feedback.v 1691 2009-12-14
10_100m_ethernet-fifo_convertor\verilog\tri_state.v 374 2009-12-14
10_100m_ethernet-fifo_convertor\verilog\TxModule.v 8137 2009-12-14
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