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xapp495(1)

  • Category : VHDL-FPGA-Verilog
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  • Update : 2018-09-26
  • Size : 47kb
  • Downloaded :0次
  • Author :lik****
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Introduction - If you have any usage issues, please Google them yourself
Implement HDMI interface 1.0, including receiver and transmitter,from Xilinx xapp
Packet file list
(Preview for download)
FilenameSizeUpdate
xapp495 0 2018-08-24
xapp495\dvi_demo 0 2018-08-24
xapp495\dvi_demo\rtl 0 2018-08-24
xapp495\dvi_demo\rtl\common 0 2018-08-24
xapp495\dvi_demo\rtl\common\DRAM16XN.v 1616 2010-10-12
xapp495\dvi_demo\rtl\common\dcmspi.v 3193 2010-10-12
xapp495\dvi_demo\rtl\common\debnce.v 3828 2010-10-12
xapp495\dvi_demo\rtl\common\hdclrbar.v 17006 2010-10-12
xapp495\dvi_demo\rtl\common\synchro.v 3798 2010-10-12
xapp495\dvi_demo\rtl\common\timing.v 7740 2010-10-12
xapp495\dvi_demo\rtl\dvi_demo.v 15608 2010-10-12
xapp495\dvi_demo\rtl\rx 0 2018-08-24
xapp495\dvi_demo\rtl\rx\chnlbond.v 5717 2010-10-12
xapp495\dvi_demo\rtl\rx\decode.v 7603 2010-10-12
xapp495\dvi_demo\rtl\rx\dvi_decoder.v 8346 2010-10-12
xapp495\dvi_demo\rtl\rx\phsaligner.v 8897 2010-10-12
xapp495\dvi_demo\rtl\rx\serdes_1_to_5_diff_data.v 14281 2010-11-07
xapp495\dvi_demo\rtl\tx 0 2018-08-24
xapp495\dvi_demo\rtl\tx\convert_30to15_fifo.v 6695 2010-10-12
xapp495\dvi_demo\rtl\tx\dvi_encoder.v 3542 2010-10-12
xapp495\dvi_demo\rtl\tx\dvi_encoder_top.v 5411 2010-10-12
xapp495\dvi_demo\rtl\tx\encode.v 7415 2010-10-12
xapp495\dvi_demo\rtl\tx\serdes_n_to_1.v 5373 2010-10-12
xapp495\dvi_demo\rtl\tx\vtc_demo.v 20387 2010-10-12
xapp495\dvi_demo\ucf 0 2018-08-24
xapp495\dvi_demo\ucf\dvi_demo.ucf 4943 2010-10-12
xapp495\dvi_demo\ucf\vtc_demo.ucf 5945 2010-10-12
xapp495\readme.txt 5128 2010-11-20
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