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down_up_dds

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2018-11-15
  • Size : 5.53mb
  • Downloaded :0次
  • Author :Par****
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
The function of AD input to down conversion is completed under Vivado, and the frequency is configurable and universal design.
Packet file list
(Preview for download)
FilenameSizeUpdate
dds_sin_cos\axi_utils_v2_0_1\hdl\axi_utils_v2_0_vh_rfs.vhd 292074 2018-09-10
dds_sin_cos\cmodel\dds_compiler_v6_0_bitacc_cmodel_lin64.zip 270145 2018-09-10
dds_sin_cos\cmodel\dds_compiler_v6_0_bitacc_cmodel_nt64.zip 347504 2018-09-10
dds_sin_cos\dds_compiler_v6_0_11\hdl\dds_compiler_v6_0.vhd 25746 2018-09-10
dds_sin_cos\dds_compiler_v6_0_11\hdl\dds_compiler_v6_0_vh_rfs.vhd 2085199 2018-09-10
dds_sin_cos\dds_sin_cos.veo 3250 2018-09-10
dds_sin_cos\dds_sin_cos.vho 3471 2018-09-10
dds_sin_cos\dds_sin_cos.xci 24966 2018-09-10
dds_sin_cos\dds_sin_cos.xml 143251 2018-09-10
dds_sin_cos\demo_tb\tb_dds_sin_cos.vhd 8994 2018-09-10
dds_sin_cos\doc\dds_compiler_v6_0_changelog.txt 7363 2018-09-10
dds_sin_cos\mult_gen_v12_0_10\hdl\mult_gen_v12_0.vhd 10054 2018-09-10
dds_sin_cos\mult_gen_v12_0_10\hdl\mult_gen_v12_0_vh_rfs.vhd 1302249 2018-09-10
dds_sin_cos\sim\dds_sin_cos.vhd 8668 2018-09-10
dds_sin_cos\synth\dds_sin_cos.vhd 10201 2018-09-10
dds_sin_cos\xbip_bram18k_v3_0_1\hdl\xbip_bram18k_v3_0.vhd 9340 2018-09-10
dds_sin_cos\xbip_bram18k_v3_0_1\hdl\xbip_bram18k_v3_0_vh_rfs.vhd 96728 2018-09-10
dds_sin_cos\xbip_dsp48_addsub_v3_0_1\hdl\xbip_dsp48_addsub_v3_0.vhd 10812 2018-09-10
dds_sin_cos\xbip_dsp48_addsub_v3_0_1\hdl\xbip_dsp48_addsub_v3_0_vh_rfs.vhd 86743 2018-09-10
dds_sin_cos\xbip_dsp48_multadd_v3_0_1\hdl\xbip_dsp48_multadd_v3_0.vhd 10163 2018-09-10
dds_sin_cos\xbip_dsp48_multadd_v3_0_1\hdl\xbip_dsp48_multadd_v3_0_vh_rfs.vhd 73491 2018-09-10
dds_sin_cos\xbip_dsp48_wrapper_v3_0_4\hdl\xbip_dsp48_wrapper_v3_0_vh_rfs.vhd 142613 2018-09-10
dds_sin_cos\xbip_pipe_v3_0_1\hdl\xbip_pipe_v3_0.vhd 8323 2018-09-10
dds_sin_cos\xbip_pipe_v3_0_1\hdl\xbip_pipe_v3_0_vh_rfs.vhd 24644 2018-09-10
dds_sin_cos\xbip_utils_v3_0_5\hdl\xbip_utils_v3_0_vh_rfs.vhd 157786 2018-09-10
mult_12_16\doc\mult_gen_v12_0_changelog.txt 5819 2018-11-15
mult_12_16\mult_12_16.dcp 81191 2018-11-15
mult_12_16\mult_12_16.veo 3069 2018-11-15
mult_12_16\mult_12_16.vho 3322 2018-11-15
mult_12_16\mult_12_16.xci 9279 2018-11-15
mult_12_16\mult_12_16.xml 59017 2018-11-15
mult_12_16\mult_12_16_ooc.xdc 2500 2018-11-15
mult_12_16\mult_12_16_sim_netlist.v 249594 2018-11-15
mult_12_16\mult_12_16_sim_netlist.vhdl 346122 2018-11-15
mult_12_16\mult_12_16_stub.v 1319 2018-11-15
mult_12_16\mult_12_16_stub.vhdl 1438 2018-11-15
mult_12_16\mult_gen_v12_0_10\hdl\mult_gen_v12_0.vhd 10054 2018-11-15
mult_12_16\mult_gen_v12_0_10\hdl\mult_gen_v12_0_vh_rfs.vhd 1302249 2018-11-15
mult_12_16\sim\mult_12_16.vhd 5051 2018-11-15
mult_12_16\synth\mult_12_16.vhd 5930 2018-11-15
mult_12_16\xbip_bram18k_v3_0_1\hdl\xbip_bram18k_v3_0.vhd 9340 2018-11-15
mult_12_16\xbip_bram18k_v3_0_1\hdl\xbip_bram18k_v3_0_vh_rfs.vhd 96728 2018-11-15
mult_12_16\xbip_pipe_v3_0_1\hdl\xbip_pipe_v3_0.vhd 8323 2018-11-15
mult_12_16\xbip_pipe_v3_0_1\hdl\xbip_pipe_v3_0_vh_rfs.vhd 24644 2018-11-15
mult_12_16\xbip_utils_v3_0_5\hdl\xbip_utils_v3_0_vh_rfs.vhd 157786 2018-11-15
down_up_dds.v 2694 2018-11-15
dds_sin_cos\axi_utils_v2_0_1\hdl 0 2018-11-15
dds_sin_cos\dds_compiler_v6_0_11\hdl 0 2018-11-15
dds_sin_cos\mult_gen_v12_0_10\hdl 0 2018-11-15
dds_sin_cos\xbip_bram18k_v3_0_1\hdl 0 2018-11-15
dds_sin_cos\xbip_dsp48_addsub_v3_0_1\hdl 0 2018-11-15
dds_sin_cos\xbip_dsp48_multadd_v3_0_1\hdl 0 2018-11-15
dds_sin_cos\xbip_dsp48_wrapper_v3_0_4\hdl 0 2018-11-15
dds_sin_cos\xbip_pipe_v3_0_1\hdl 0 2018-11-15
dds_sin_cos\xbip_utils_v3_0_5\hdl 0 2018-11-15
mult_12_16\mult_gen_v12_0_10\hdl 0 2018-11-15
mult_12_16\xbip_bram18k_v3_0_1\hdl 0 2018-11-15
mult_12_16\xbip_pipe_v3_0_1\hdl 0 2018-11-15
mult_12_16\xbip_utils_v3_0_5\hdl 0 2018-11-15
dds_sin_cos\axi_utils_v2_0_1 0 2018-11-15
dds_sin_cos\cmodel 0 2018-11-15
dds_sin_cos\dds_compiler_v6_0_11 0 2018-11-15
dds_sin_cos\demo_tb 0 2018-11-15
dds_sin_cos\doc 0 2018-11-15
dds_sin_cos\mult_gen_v12_0_10 0 2018-11-15
dds_sin_cos\sim 0 2018-11-15
dds_sin_cos\synth 0 2018-11-15
dds_sin_cos\xbip_bram18k_v3_0_1 0 2018-11-15
dds_sin_cos\xbip_dsp48_addsub_v3_0_1 0 2018-11-15
dds_sin_cos\xbip_dsp48_multadd_v3_0_1 0 2018-11-15
dds_sin_cos\xbip_dsp48_wrapper_v3_0_4 0 2018-11-15
dds_sin_cos\xbip_pipe_v3_0_1 0 2018-11-15
dds_sin_cos\xbip_utils_v3_0_5 0 2018-11-15
mult_12_16\doc 0 2018-11-15
mult_12_16\mult_gen_v12_0_10 0 2018-11-15
mult_12_16\sim 0 2018-11-15
mult_12_16\synth 0 2018-11-15
mult_12_16\xbip_bram18k_v3_0_1 0 2018-11-15
mult_12_16\xbip_pipe_v3_0_1 0 2018-11-15
mult_12_16\xbip_utils_v3_0_5 0 2018-11-15
dds_sin_cos 0 2018-11-15
mult_12_16 0 2018-11-15
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