The source code of the realization of digital signal processing on FPGA (4th edition) is of great reference value.

Filename	Size	Update
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\.qsys_edit\filters.xml	66	2013-07-15
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\.qsys_edit\preferences.xml	835	2013-09-20
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\c-source\hello_world.c	714	2013-09-20
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\c-source\madtest.c	875	2013-07-23
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\c-source\motion.c	7935	2013-07-19
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\c-source\my_swap.c	3194	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\CI_SWAP_hw.tcl	1284	2013-07-12
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\custominstruction.vhd	876	2013-07-12
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\DE2_115_CI_Computer.jdi	19198	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\DE2_115_CI_Computer.pin	91551	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\DE2_115_CI_Computer.pof	8388812	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\DE2_115_CI_Computer.qpf	120	2013-07-15
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\DE2_115_CI_Computer.qsf	67646	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\DE2_115_CI_Computer.qws	770	2013-09-20
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\DE2_115_CI_Computer.sof	3562141	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\DE2_115_CI_Computer.vhd	7539	2013-09-20
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\MAD_hw.tcl	1269	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\nios_system.qip	20400	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\nios_system.v	622847	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_avalon_sc_fifo.v	32228	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_customins_master_translator.v	7971	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_customins_slave_translator.sv	5547	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_merlin_address_alignment.sv	11438	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_merlin_arbitrator.sv	9447	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_merlin_burst_adapter.sv	56179	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_merlin_burst_uncompressor.sv	12940	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_merlin_master_agent.sv	10667	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_merlin_master_translator.sv	16791	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_merlin_slave_agent.sv	22861	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_merlin_slave_translator.sv	16032	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_merlin_width_adapter.sv	55005	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_reset_controller.sdc	1734	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_reset_controller.v	3584	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_reset_synchronizer.v	3553	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_up_rs232_counters.v	7484	2013-02-19
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_up_rs232_in_deserializer.v	8150	2013-02-19
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_up_rs232_out_serializer.v	8342	2013-02-19
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\altera_up_sync_fifo.v	7031	2013-02-19
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\bitswap_qsys.v	2440	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\custominstruction.vhd	1698	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\mad.vhd	1418	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_addr_router.sv	6758	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_addr_router_001.sv	9709	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_cmd_xbar_demux.sv	4802	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_cmd_xbar_demux_001.sv	11213	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_cmd_xbar_mux.sv	12089	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_CPU.sdc	3920	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_CPU.v	207405	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_CPU_custom_instruction_master_comb_xconnect.sv	6060	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_CPU_jtag_debug_module_sysclk.v	7081	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_CPU_jtag_debug_module_tck.v	8424	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_CPU_jtag_debug_module_wrapper.v	10325	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_CPU_ociram_default_contents.mif	5714	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_CPU_oci_test_bench.v	1489	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_CPU_rf_ram_a.mif	600	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_CPU_rf_ram_b.mif	600	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_CPU_test_bench.v	30782	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_Expansion_JP5.v	9320	2013-02-19
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_Green_LEDs.v	7369	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_HEX3_HEX0.v	7569	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_HEX7_HEX4.v	7569	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_id_router.sv	6058	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_id_router_002.sv	5988	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_id_router_003.sv	5988	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_id_router_012.sv	5985	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_id_router_014.sv	5985	2013-02-19
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_Interval_Timer.v	7054	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_irq_mapper.sv	1915	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_JTAG_UART.v	24137	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_JTAG_UART_input_mutex.dat	3	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_JTAG_UART_input_stream.dat	10	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_JTAG_UART_output_stream.dat	0	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_Onchip_memory.hex	43021	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_Onchip_memory.v	6198	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_Pushbuttons.v	8538	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_Red_LEDs.v	7368	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_rsp_xbar_demux.sv	4166	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_rsp_xbar_demux_002.sv	3538	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_rsp_xbar_mux.sv	12209	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_rsp_xbar_mux_001.sv	20377	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_SDRAM.v	24521	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_Serial_Port.v	9979	2013-02-19
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_Slider_Switches.v	7262	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_SRAM.v	7404	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system\synthesis\submodules\nios_system_sysid.v	1450	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system.bsf	13375	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system.cmp	3016	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system.html	101891	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system.qsys	45537	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\nios_system.sopcinfo	403802	2013-07-18
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\qclean.bat	370	2012-06-14
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\sdram_pll.qip	366	2012-11-01
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\sdram_pll.vhd	16631	2012-11-01
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\software\.metadata\.lock	0	2013-09-20
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\software\.metadata\.log	5243	2013-09-21
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\software\.metadata\.mylyn\repositories.xml.zip	442	2013-09-20
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\software\.metadata\.plugins\org.eclipse.cdt.core\.log	82	2013-09-21
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\software\.metadata\.plugins\org.eclipse.cdt.core\Motion.1379688933268.pdom	454656	2013-09-21
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\software\.metadata\.plugins\org.eclipse.cdt.core\Motion_bsp.1379688929580.pdom	290816	2013-09-21
数字信号处理在FPGA中的实现源码\DE2_115_CI_Computer\software\.metadata\.plugins\org.eclipse.cdt.make.core\.log	0	2013-09-20

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