Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: 3x3均值滤波，完整verilog源码工程 Download
 Description: 直接下载到炫视开发板可处理HDMI 1080p视频，用到了线缓存和快速除法器
 Downloaders recently: [More information of uploader cloudkissme]
 To Search: 均值滤波
File list (Check if you may need any files):

CodeBus www.codebus.net