Introduction - If you have any usage issues, please Google them yourself
A CPU of 16 simple Verilog source code.
Packet : 81404620simplecpu.rar filelist
simplecpu\simplecpu_design.doc
simplecpu\src\ac.v
simplecpu\src\alu.v
simplecpu\src\ar.v
simplecpu\src\control.v
simplecpu\src\cpu.v
simplecpu\src\cpu.v.bak
simplecpu\src\dr.v
simplecpu\src\ir.v
simplecpu\src\m.v
simplecpu\src\pc.v
simplecpu\src\top.v
simplecpu\src\wave.awf
simplecpu\src\说明.txt
simplecpu\src
simplecpu