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  • Category : VHDL-FPGA-Verilog
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  • Update : 2019-05-01
  • Size : 928kb
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  • Author :SEXY****
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Introduction - If you have any usage issues, please Google them yourself
The adaptive equalizer based on the symbol LMS algorithm is simulated. The performance simulation of the algorithm is required, the input signal for FPGA test is generated, and the data range of simulation weight in the operation process is required.
Packet file list
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FilenameSizeUpdate
E7_3 0 2019-04-28
E7_3\E7_3_EqualizerSigAnalysis.m 1126 2014-06-25
E7_3\E7_3_EqualizerSigProduce.m 2732 2014-06-25
E7_3\E7_3_EqualizerSim.m 2577 2014-06-25
E7_3\E7_3_e_out.txt 20001 2014-06-25
E7_3\E7_3_r_in.txt 36001 2014-12-22
E7_3\E7_3_x_in.txt 36001 2014-12-22
E7_3\Equalizer 0 2019-04-28
E7_3\Equalizer\Equalizer.jdi 135 2014-06-26
E7_3\Equalizer\Equalizer.qpf 1272 2014-06-24
E7_3\Equalizer\Equalizer.qsf 4070 2014-06-26
E7_3\Equalizer\Equalizer.qws 826 2014-06-30
E7_3\Equalizer\Equalizer.sdc 1407 2014-06-25
E7_3\Equalizer\Equalizer_nativelink_simulation.rpt 989 2014-06-26
E7_3\Equalizer\db 0 2019-04-28
E7_3\Equalizer\db\Equalizer.db_info 138 2014-06-30
E7_3\Equalizer\db\Equalizer.qns 15 2014-06-30
E7_3\Equalizer\db\Equalizer.sas 18 2014-06-30
E7_3\Equalizer\db\Equalizer.sld_design_entry.sci 199 2014-06-30
E7_3\Equalizer\greybox_tmp 0 2019-04-28
E7_3\Equalizer\greybox_tmp\cbx_args.txt 199 2014-06-30
E7_3\Equalizer\incremental_db 0 2019-04-28
E7_3\Equalizer\incremental_db\README 653 2014-06-24
E7_3\Equalizer\incremental_db\compiled_partitions 0 2019-04-28
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.db_info 138 2014-06-24
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.cmp.ammdb 3225 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.cmp.cdb 44134 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.cmp.dfp 33 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.cmp.hdb 34047 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.cmp.kpt 203 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.cmp.rcfdb 70962 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.map.cdb 28283 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.map.dpi 2323 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.map.hbdb.cdb 629 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.map.hbdb.hb_info 46 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.map.hbdb.hdb 30997 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.map.hbdb.sig 32 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.map.hdb 29758 2014-06-26
E7_3\Equalizer\incremental_db\compiled_partitions\Equalizer.root_partition.map.kpt 10302 2014-06-26
E7_3\Equalizer\mult.qip 273 2014-06-24
E7_3\Equalizer\mult.v 4773 2014-06-24
E7_3\Equalizer\mult_bb.v 4127 2014-06-24
E7_3\Equalizer\output_files 0 2019-05-01
E7_3\Equalizer\simulation 0 2019-04-28
E7_3\Equalizer\simulation\modelsim 0 2019-04-28
E7_3\Equalizer\simulation\modelsim\E7_3_Error_out.txt 16008 2014-06-26
E7_3\Equalizer\simulation\modelsim\E7_3_r_in.txt 36001 2014-06-25
E7_3\Equalizer\simulation\modelsim\E7_3_x_in.txt 36001 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer.sft 359 2014-06-26
E7_3\Equalizer\simulation\modelsim\Equalizer.vht.bak 3370 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer.vo 768095 2014-06-26
E7_3\Equalizer\simulation\modelsim\Equalizer.vt 4147 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer.vt.bak 3062 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_8_1200mv_0c_slow.vo 768112 2014-06-26
E7_3\Equalizer\simulation\modelsim\Equalizer_8_1200mv_0c_v_slow.sdo 567743 2014-06-26
E7_3\Equalizer\simulation\modelsim\Equalizer_8_1200mv_85c_slow.vo 768113 2014-06-26
E7_3\Equalizer\simulation\modelsim\Equalizer_8_1200mv_85c_v_slow.sdo 568326 2014-06-26
E7_3\Equalizer\simulation\modelsim\Equalizer_min_1200mv_0c_fast.vo 768114 2014-06-26
E7_3\Equalizer\simulation\modelsim\Equalizer_min_1200mv_0c_v_fast.sdo 552650 2014-06-26
E7_3\Equalizer\simulation\modelsim\Equalizer_modelsim.xrf 68236 2014-06-26
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do 793 2014-06-26
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak1 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak10 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak11 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak2 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak3 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak4 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak5 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak6 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak7 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak8 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_run_msim_rtl_verilog.do.bak9 793 2014-06-25
E7_3\Equalizer\simulation\modelsim\Equalizer_v.sdo 568326 2014-06-26
E7_3\Equalizer\simulation\modelsim\modelsim.ini 11131 2014-06-26
E7_3\Equalizer\simulation\modelsim\msim_transcript 3069 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work 0 2019-04-28
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer 0 2019-04-28
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer\_primary.dat 3721 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer\_primary.dbs 3432 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer\_primary.vhd 432 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer\verilog.prw 2727 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer\verilog.psm 48712 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer_vlg_tst 0 2019-04-28
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer_vlg_tst\_primary.dat 1620 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer_vlg_tst\_primary.dbs 2110 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer_vlg_tst\_primary.vhd 803 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer_vlg_tst\verilog.prw 1362 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\@equalizer_vlg_tst\verilog.psm 22576 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\_info 2122 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\_temp 0 2019-05-01
E7_3\Equalizer\simulation\modelsim\rtl_work\_vmake 26 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\mult 0 2019-04-28
E7_3\Equalizer\simulation\modelsim\rtl_work\mult\_primary.dat 870 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\mult\_primary.dbs 695 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\mult\_primary.vhd 359 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\mult\verilog.prw 353 2014-06-26
E7_3\Equalizer\simulation\modelsim\rtl_work\mult\verilog.psm 7184 2014-06-26
E7_3\Equalizer\simulation\modelsim\vsim.wlf 368640 2014-06-26
E7_3\Equalizer\source 0 2019-04-28
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