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DE2_115_Default

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2019-05-08
  • Size : 3.01mb
  • Downloaded :1次
  • Author :流火***
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
The DE2-115 board is shipped from the factory with a default configuration bit-stream that demonstrates some of the basic features of the board.
Packet file list
(Preview for download)
FilenameSizeUpdate
DE2_115_Default 0 2019-05-07
DE2_115_Default\DE2_115_Default.done 26 2012-12-05
DE2_115_Default\DE2_115_Default.fit.smsg 567 2012-12-05
DE2_115_Default\DE2_115_Default.fit.summary 656 2012-12-05
DE2_115_Default\DE2_115_Default.jdi 338 2012-12-05
DE2_115_Default\DE2_115_Default.map.smsg 364 2012-12-05
DE2_115_Default\DE2_115_Default.map.summary 500 2012-12-05
DE2_115_Default\DE2_115_Default.pin 90774 2012-12-05
DE2_115_Default\DE2_115_Default.pof 8388828 2012-12-05
DE2_115_Default\DE2_115_Default.qpf 1286 2012-12-05
DE2_115_Default\DE2_115_Default.qsf 68405 2012-12-05
DE2_115_Default\DE2_115_Default.qws 1030 2012-12-05
DE2_115_Default\DE2_115_Default.sof 3541365 2012-12-05
DE2_115_Default\DE2_115_Default.sta.summary 5687 2012-12-05
DE2_115_Default\DE2_115_Default.v 14500 2012-12-05
DE2_115_Default\DE2_115_Default_assignment_defaults.qdf 48206 2012-12-05
DE2_115_Default\PLLJ_PLLSPE_INFO.txt 128 2012-12-05
DE2_115_Default\V 0 2019-05-07
DE2_115_Default\V\AUDIO_DAC.v 8754 2012-12-05
DE2_115_Default\V\I2C_AV_Config.v 4357 2012-12-05
DE2_115_Default\V\I2C_Controller.v 3871 2012-12-05
DE2_115_Default\V\Index.mif 3662 2012-12-05
DE2_115_Default\V\LCD.V 4050 2012-12-05
DE2_115_Default\V\LCD_Controller.v 1477 2012-12-05
DE2_115_Default\V\LCD_TEST.v 3166 2012-12-05
DE2_115_Default\V\PLLJ_PLLSPE_INFO.txt 128 2012-12-05
DE2_115_Default\V\Reset_Delay.v 233 2012-12-05
DE2_115_Default\V\SEG7_LUT.v 705 2012-12-05
DE2_115_Default\V\SEG7_LUT_8.v 458 2012-12-05
DE2_115_Default\V\VGA_Audio_PLL.qip 287 2012-12-05
DE2_115_Default\V\VGA_Audio_PLL.v 17890 2012-12-05
DE2_115_Default\V\img_data.mif 3904592 2012-12-05
DE2_115_Default\V\img_data.qip 285 2012-12-05
DE2_115_Default\V\img_data.v 6804 2012-12-05
DE2_115_Default\V\img_data_inst.v 98 2012-12-05
DE2_115_Default\V\img_data_wave0.jpg 85725 2012-12-05
DE2_115_Default\V\img_data_waveforms.html 924 2012-12-05
DE2_115_Default\V\img_index.qip 287 2012-12-05
DE2_115_Default\V\img_index.v 6801 2012-12-05
DE2_115_Default\V\img_index_inst.v 100 2012-12-05
DE2_115_Default\V\img_index_wave0.jpg 90413 2012-12-05
DE2_115_Default\V\img_index_waveforms.html 945 2012-12-05
DE2_115_Default\V\vga_controller.v 1782 2012-12-05
DE2_115_Default\V\video_sync_generator.v 2895 2012-12-05
DE2_115_Default\VGA_DATA 0 2019-05-07
DE2_115_Default\VGA_DATA\PrintNum.exe 188466 2012-12-05
DE2_115_Default\VGA_DATA\img_data_logo.mif 3309389 2012-12-05
DE2_115_Default\VGA_DATA\index_logo.mif 3147 2012-12-05
DE2_115_Default\VGA_DATA\test.bmp 308278 2012-12-05
DE2_115_Default\de2_115_default.sdc 2462 2012-12-05
DE2_115_Default\demo_batch 0 2019-05-07
DE2_115_Default\demo_batch\DE2_115_Default.bat 146 2012-12-05
DE2_115_Default\demo_batch\DE2_115_Default.sof 3541365 2012-12-05
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