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龙芯一代开源处理器内核

  • Category : VHDL-FPGA-Verilog
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  • Update : 2021-09-25
  • Size : 52.96kb
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  • Author :EEOOFF
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龙芯一代开源处理器内核源代码,Verilog格式
Packet file list
(Preview for download)
Packet : cpu_gs132.zip filelist
cpu_gs132/
cpu_gs132/README.md
cpu_gs132/ls132r_decode_stage.v
cpu_gs132/ls132r_define.h
cpu_gs132/ls132r_ejtag_dcr.v
cpu_gs132/ls132r_ejtag_hb.v
cpu_gs132/ls132r_ejtag_tap.v
cpu_gs132/ls132r_ejtag_tap_buffer.v
cpu_gs132/ls132r_execute_stage.v
cpu_gs132/ls132r_fetch_stage.v
cpu_gs132/ls132r_interface.v
cpu_gs132/ls132r_tools.v
cpu_gs132/ls132r_top.v
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