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EBCOT Processor 源码

  • Category : VHDL-FPGA-Verilog
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  • Update : 2011-11-21
  • Size : 3.92mb
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硬件实现JPEG2000 EBCOT 编码的源码
Packet file list
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Packet : ebcot.rar filelist
ebcot/004_jpc_t1enc.c.txt
ebcot/ERCBench JPEG2000 EBCOT Processor.doc
ebcot/ERCBench JPEG2000 EBCOT Processor.docx
ebcot/ERCBench JPEG2000 EBCOT Processor.pdf
ebcot/jpeg2000_ebcot_cf_1.0/bitplane_select.v
ebcot/jpeg2000_ebcot_cf_1.0/context_formation.v
ebcot/jpeg2000_ebcot_cf_1.0/control.v
ebcot/jpeg2000_ebcot_cf_1.0/countn.v
ebcot/jpeg2000_ebcot_cf_1.0/data_mem1.v
ebcot/jpeg2000_ebcot_cf_1.0/data_mem2.v
ebcot/jpeg2000_ebcot_cf_1.0/ebcot.v
ebcot/jpeg2000_ebcot_cf_1.0/input_files/block_file.txt
ebcot/jpeg2000_ebcot_cf_1.0/input_files/block_file_22x64_080eeefc.txt
ebcot/jpeg2000_ebcot_cf_1.0/input_files/sm_zeros.txt
ebcot/jpeg2000_ebcot_cf_1.0/LUT_kmag.v
ebcot/jpeg2000_ebcot_cf_1.0/LUT_ksig.v
ebcot/jpeg2000_ebcot_cf_1.0/LUT_ksign.v
ebcot/jpeg2000_ebcot_cf_1.0/magnitude_reg.v
ebcot/jpeg2000_ebcot_cf_1.0/pass_one.v
ebcot/jpeg2000_ebcot_cf_1.0/pass_two.v
ebcot/jpeg2000_ebcot_cf_1.0/pass_zero.v
ebcot/jpeg2000_ebcot_cf_1.0/priority_encoder_12b.v
ebcot/jpeg2000_ebcot_cf_1.0/priority_encoder_4b.v
ebcot/jpeg2000_ebcot_cf_1.0/priority_encoder_8b.v
ebcot/jpeg2000_ebcot_cf_1.0/reg4.v
ebcot/jpeg2000_ebcot_cf_1.0/register.v
ebcot/jpeg2000_ebcot_cf_1.0/regN.v
ebcot/jpeg2000_ebcot_cf_1.0/runmode_check.v
ebcot/jpeg2000_ebcot_cf_1.0/shift_reg.v
ebcot/jpeg2000_ebcot_cf_1.0/sign_encode_calc.v
ebcot/jpeg2000_ebcot_cf_1.0/state_mem1.v
ebcot/jpeg2000_ebcot_cf_1.0/state_mem2.v
ebcot/jpeg2000_ebcot_cf_1.0/stream_files/22x64.txt
ebcot/jpeg2000_ebcot_cf_1.0/stream_files/change_contexts.sh
ebcot/jpeg2000_ebcot_cf_1.0/stripe_logic.v
ebcot/jpeg2000_ebcot_cf_1.0/testbench.v
ebcot/jpeg2000_ebcot_cf_1.0/t_data_mem1.v
ebcot/jpeg2000_ebcot_cf_1.0/t_data_mem2.v
ebcot/jpeg2000_ebcot_cf_1.0/t_ebcot.v
ebcot/jpeg2000_ebcot_cf_1.0/t_pass_one.v
ebcot/jpeg2000_ebcot_cf_2.0/bitplane_select.v
ebcot/jpeg2000_ebcot_cf_2.0/context_formation.v
ebcot/jpeg2000_ebcot_cf_2.0/control.v
ebcot/jpeg2000_ebcot_cf_2.0/countn.v
ebcot/jpeg2000_ebcot_cf_2.0/data_mem1.v
ebcot/jpeg2000_ebcot_cf_2.0/data_mem2.v
ebcot/jpeg2000_ebcot_cf_2.0/ebcot.v
ebcot/jpeg2000_ebcot_cf_2.0/ebcot_large_buffer.v
ebcot/jpeg2000_ebcot_cf_2.0/expected_output.txt
ebcot/jpeg2000_ebcot_cf_2.0/input.txt
ebcot/jpeg2000_ebcot_cf_2.0/LUT_kmag.v
ebcot/jpeg2000_ebcot_cf_2.0/LUT_ksig.v
ebcot/jpeg2000_ebcot_cf_2.0/LUT_ksign.v
ebcot/jpeg2000_ebcot_cf_2.0/magnitude_reg.v
ebcot/jpeg2000_ebcot_cf_2.0/output.txt
ebcot/jpeg2000_ebcot_cf_2.0/output_buffer.v
ebcot/jpeg2000_ebcot_cf_2.0/pass_one.v
ebcot/jpeg2000_ebcot_cf_2.0/pass_two.v
ebcot/jpeg2000_ebcot_cf_2.0/pass_zero.v
ebcot/jpeg2000_ebcot_cf_2.0/priority_encoder_12b.v
ebcot/jpeg2000_ebcot_cf_2.0/priority_encoder_4b.v
ebcot/jpeg2000_ebcot_cf_2.0/priority_encoder_8b.v
ebcot/jpeg2000_ebcot_cf_2.0/reg4.v
ebcot/jpeg2000_ebcot_cf_2.0/register.v
ebcot/jpeg2000_ebcot_cf_2.0/regN.v
ebcot/jpeg2000_ebcot_cf_2.0/runmode_check.v
ebcot/jpeg2000_ebcot_cf_2.0/shift_reg.v
ebcot/jpeg2000_ebcot_cf_2.0/sign_encode_calc.v
ebcot/jpeg2000_ebcot_cf_2.0/state_mem1.v
ebcot/jpeg2000_ebcot_cf_2.0/state_mem2.v
ebcot/jpeg2000_ebcot_cf_2.0/stripe_logic.v
ebcot/jpeg2000_ebcot_cf_2.0/t_ebcot.v
ebcot/Verification/.fft_gen.pl.swp
ebcot/Verification/ERCBench Verification.pdf
ebcot/Verification/fft_gen.c~
ebcot/Verification/insert_stall.pl~
ebcot/Verification/src/verilog/bft1.v
ebcot/Verification/src/verilog/bft2.v
ebcot/Verification/src/verilog/bf_control.v
ebcot/Verification/src/verilog/bf_control.v~
ebcot/Verification/src/verilog/bf_fifo.v
ebcot/Verification/src/verilog/bf_mux.v
ebcot/Verification/src/verilog/bf_pipe.v
ebcot/Verification/src/verilog/bf_pipe.v~
ebcot/Verification/src/verilog/fft.cr.mti
ebcot/Verification/src/verilog/fft.mpf
ebcot/Verification/src/verilog/fft.v
ebcot/Verification/src/verilog/fft.v.bak
ebcot/Verification/src/verilog/fft.v~
ebcot/Verification/src/verilog/fifo.v
ebcot/Verification/src/verilog/PipelineFFT.cr.mti
ebcot/Verification/src/verilog/PipelineFFT.mpf
ebcot/Verification/src/verilog/rom.v
ebcot/Verification/src/verilog/stage.v
ebcot/Verification/src/verilog/stage.v~
ebcot/Verification/src/verilog/testbench.v
ebcot/Verification/src/verilog/testbench.v.bak
ebcot/Verification/src/verilog/vsim.wlf
ebcot/Verification/src/verilog/work/bft1/_primary.dat
ebcot/Verification/src/verilog/work/bft1/_primary.dbs
ebcot/Verification/src/verilog/work/bft1/_primary.vhd
ebcot/Verification/src/verilog/work/bft2/_primary.dat
ebcot/Verification/src/verilog/work/bft2/_primary.dbs
ebcot/Verification/src/verilog/work/bft2/_primary.vhd
ebcot/Verification/src/verilog/work/bf_control/_primary.dat
ebcot/Verification/src/verilog/work/bf_control/_primary.dbs
ebcot/Verification/src/verilog/work/bf_control/_primary.vhd
ebcot/Verification/src/verilog/work/bf_fifo/_primary.dat
ebcot/Verification/src/verilog/work/bf_fifo/_primary.dbs
ebcot/Verification/src/verilog/work/bf_fifo/_primary.vhd
ebcot/Verification/src/verilog/work/bf_mux/_primary.dat
ebcot/Verification/src/verilog/work/bf_mux/_primary.dbs
ebcot/Verification/src/verilog/work/bf_mux/_primary.vhd
ebcot/Verification/src/verilog/work/bf_pipe/_primary.dat
ebcot/Verification/src/verilog/work/bf_pipe/_primary.dbs
ebcot/Verification/src/verilog/work/bf_pi
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