used in the preparation of Verilog FLEX10K achieve simple CPU

alu.v
alu.v.bak
controlunit.v
controlunit.v.bak
decoder.v
decoder.v.bak
documentation.txt
memory.v
memory.v.bak
mux2.v
mux2.v.bak
mycpu.cr.mti
mycpu.mpf
programcounter.v
programcounter.v.bak
register.v
register.v.bak
registerfile.v
top.v
top.v.bak
transcript
vish_stacktrace.vstf
vsim.wlf
wave.do

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