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uart from opencores

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 9kb
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  • Author :熊***
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Introduction - If you have any usage issues, please Google them yourself
VHDL implement serial port, it can communicate with pc, it can accept and send message, and it can be interrupted.
Packet file list
(Preview for download)
clkUnit.vhd
miniUART.vhd
RxUnit.vhd
transcript
TxUnit.vhd
UARTtest.vhd
uart_lib.vhd
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