use VHDL to achieve controllable pulse width of a simple process simulation environment Segments-

pulse_change
............\cmp_state.ini
............\db
............\..\pulse.asm.qmsg
............\..\pulse.cmp.cdb
............\..\pulse.cmp.ddb
............\..\pulse.cmp.hdb
............\..\pulse.cmp.rdb
............\..\pulse.cmp.tdb
............\..\pulse.dat_manager.dat
............\..\pulse.db_info
............\..\pulse.fit.qmsg
............\..\pulse.hier_info
............\..\pulse.hif
............\..\pulse.icc
............\..\pulse.map.cdb
............\..\pulse.map.hdb
............\..\pulse.map.qmsg
............\..\pulse.pre_map.hdb
............\..\pulse.project.hdb
............\..\pulse.rtlv.hdb
............\..\pulse.rtlv_sg.cdb
............\..\pulse.rtlv_sg_swap.cdb
............\..\pulse.sgdiff.cdb
............\..\pulse.sgdiff.hdb
............\..\pulse.signalprobe.cdb
............\..\pulse.sim.hdb
............\..\pulse.sim.qmsg
............\..\pulse.sim.rdb
............\..\pulse.sim.vwf
............\..\pulse.sld_design_entry.sci
............\..\pulse.sld_design_entry_dsc.sci
............\..\pulse.syn_hier_info
............\..\pulse.tan.qmsg
............\..\pulse_cmp.qrpt
............\..\pulse_sim.qrpt
............\pulse.asm.rpt
............\pulse.done
............\pulse.fit.eqn
............\pulse.fit.rpt
............\pulse.fit.summary
............\pulse.flow.rpt
............\pulse.map.eqn
............\pulse.map.rpt
............\pulse.map.summary
............\pulse.pin
............\pulse.pof
............\pulse.qpf
............\pulse.qsf
............\pulse.qws
............\pulse.sim.rpt
............\pulse.sof
............\pulse.tan.rpt
............\pulse.tan.summary
............\pulse.vhd
............\pulse.vwf
............\sim.cfg
............\Waveform1.vwf

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