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I2C总线控制器 Xilinx提供

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 869kb
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  • Author :司***
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Introduction - If you have any usage issues, please Google them yourself
I2C bus contrll functions implemented by Verilog HDL.
Packet file list
(Preview for download)
i2c.cxt
i2c.jed
i2c.npl
i2c.rpt
i2c.vhd
i2c_control.vhd
i2c_timesim.vhd
micro_master_tb.vhd
micro_slave_tb.vhd
micro_tb.vhd
micro_test.do
micro_test.vhd
micro_test_post.do
micro_test_post.vhd
pullup.vhd
readme.txt
read_me.doc
shift.vhd
uc_interface.vhd
upcnt4.vhd
upcnt4_tb.vhd
upcnt4_tb_post.vhd
wave.do
wave_post.do
work
....\i2c
....\...\behave.dat
....\...\behave.psm
....\...\structure.dat
....\...\structure.psm
....\...\_primary.dat
....\i2c_control
....\...........\behave.dat
....\...........\behave.psm
....\...........\_primary.dat
....\micro_master_tb
....\...............\rtl.dat
....\...............\rtl.psm
....\...............\_primary.dat
....\micro_slave_tb
....\..............\rtl.dat
....\..............\rtl.psm
....\..............\_primary.dat
....\micro_tb
....\........\rtl.dat
....\........\rtl.psm
....\........\_primary.dat
....\micro_test
....\..........\archmicro_test.dat
....\..........\archmicro_test.psm
....\..........\_primary.dat
....\micro_test_post
....\...............\archmicro_test_post.dat
....\...............\archmicro_test_post.psm
....\...............\_primary.dat
....\pullup
....\......\archpullup.dat
....\......\archpullup.psm
....\......\_primary.dat
....\roc
....\...\roc_v.dat
....\...\roc_v.psm
....\...\_primary.dat
....\shift8
....\......\definition.dat
....\......\definition.psm
....\......\_primary.dat
....\uc_interface
....\............\behaviour.dat
....\............\behaviour.psm
....\............\_primary.dat
....\upcnt4
....\......\definition.dat
....\......\definition.psm
....\......\_primary.dat
....\_info
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