NIOS II FPGA platform a CF card interface module, Quartus II is the complete package works

std_cf_2c35
...........\add_constraints_for_ddr_sdram.tcl
...........\auto_add_ddr_constraints.tcl
...........\auto_verify_ddr_timing.tcl
...........\bb_list.txt
...........\button_pio.v
...........\cf.v
...........\cmp_state.ini
...........\constraints_out.txt
...........\cpu.ocp
...........\cpu.v
...........\cpu_jtag_debug_module.v
...........\cpu_jtag_debug_module_wrapper.v
...........\cpu_mult_cell.v
...........\cpu_ociram_default_contents.mif
...........\cpu_test_bench.v
...........\db
...........\..\standard.db_info
...........\..\standard.eco.cdb
...........\..\standard.sld_design_entry.sci
...........\ddr_lib_path.tcl
...........\ddr_pll_cycloneii.v
...........\ddr_sdram.cmp
...........\ddr_sdram.html
...........\ddr_sdram.inc
...........\ddr_sdram.v
...........\ddr_sdram_auk_ddr_clk_gen.v
...........\ddr_sdram_auk_ddr_datapath.v
...........\ddr_sdram_auk_ddr_dqs_group.v
...........\ddr_sdram_auk_ddr_sdram.v
...........\ddr_sdram_bb.v
...........\ddr_sdram_ddr_settings.txt
...........\ddr_sdram_debug_design.v
...........\ddr_sdram_debug_design_1.v
...........\ddr_sdram_debug_design_tb_1.v
...........\ddr_sdram_example_driver.v
...........\ddr_sdram_extraction_data.txt
...........\ddr_sdram_extraction_log.txt
...........\ddr_sdram_extraction_log2.txt
...........\ddr_sdram_inst.v
...........\ddr_sdram_post_summary.txt
...........\ddr_sdram_pre_compile_ddr_timing_summary.txt
...........\ddr_sdram_test_component.v
...........\epcs_controller.v
...........\epcs_controller_boot_rom.hex
...........\estimated_data.txt
...........\high_res_timer.v
...........\ic_tag_ram.mif
...........\jtag_uart.v
...........\led_pio.v
...........\pin_assignment_script.txt
...........\readme.txt
...........\reconfig_request_pio.v
...........\remove_add_constraints_for_ddr_sdram.tcl
...........\remove_add_constraints_for_ddr_sdram_2005_04_20___20_33.tcl
...........\remove_add_constraints_for_ddr_sdram_2005_05_13___11_42.tcl
...........\rf_ram_a.mif
...........\rf_ram_b.mif
...........\seven_seg_pio.v
...........\simgen_init.txt
...........\sopc_builder_debug_log.txt
...........\ssram_pll.v
...........\standard.bdf
...........\standard.pin
...........\standard.qpf
...........\standard.qsf
...........\standard.qws
...........\standard.sof
...........\std_2C35.bsf
...........\std_2C35.ptf
...........\std_2C35.v
...........\std_2C35_setup_quartus.tcl
...........\sysid.v
...........\sys_clk_timer.v
...........\uart1.v
...........\verify_timing_for_ddr_sdram.tcl

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