These are examples of Verilog Programming 5 for reference

Example-2-5
...........\HDLBencher_ALU
...........\..............\alu_vlog
...........\..............\........\alu.edn
...........\..............\........\alu.fse
...........\..............\........\ALU.jhd
...........\..............\........\alu.ldo
...........\..............\........\alu.log
...........\..............\........\alu.ncf
...........\..............\........\alu.plg
...........\..............\........\alu.prj
...........\..............\........\alu.sdc
...........\..............\........\alu.spl
...........\..............\........\alu.srd
...........\..............\........\alu.srm
...........\..............\........\alu.srr
...........\..............\........\alu.srs
...........\..............\........\alu.sym
...........\..............\........\alu.tfi
...........\..............\........\alu.tlg
...........\..............\........\ALU.V
...........\..............\........\alu_compile.tcl
...........\..............\........\alu_map.tcl
...........\..............\........\alu_tst_wave.ant
...........\..............\........\alu_tst_wave.fdo
...........\..............\........\alu_tst_wave.jhd
...........\..............\........\alu_tst_wave.tbw
...........\..............\........\alu_tst_wave.tfw
...........\..............\........\alu_tst_wave.udo
...........\..............\........\alu_vlog.npl
...........\..............\........\alu_vlog.ptf
...........\..............\........\alu_vlog_syn1
...........\..............\........\.............\ALU.edf
...........\..............\........\.............\ALU.fse
...........\..............\........\.............\ALU.ncf
...........\..............\........\.............\ALU.plg
...........\..............\........\.............\ALU.srd
...........\..............\........\.............\ALU.srm
...........\..............\........\.............\ALU.srr
...........\..............\........\.............\ALU.srs
...........\..............\........\.............\ALU.tlg
...........\..............\........\.............\syntax.log
...........\..............\........\alu_vlog_synpro.prd
...........\..............\........\alu_vlog_synpro.prj
...........\..............\........\automake.log
...........\..............\........\HDL_DEMO.V
...........\..............\........\results.txt
...........\..............\........\stdout.log
...........\..............\........\transcript
...........\..............\........\userlang.tpl
...........\..............\........\vsim.wlf
...........\..............\........\work
...........\..............\........\....\alu
...........\..............\........\....\...\verilog.asm
...........\..............\........\....\...\_primary.dat
...........\..............\........\....\...\_primary.vhd
...........\..............\........\....\glbl
...........\..............\........\....\....\verilog.asm
...........\..............\........\....\....\_primary.dat
...........\..............\........\....\....\_primary.vhd
...........\..............\........\....\hdl_demo
...........\..............\........\....\........\verilog.asm
...........\..............\........\....\........\_primary.dat
...........\..............\........\....\........\_primary.vhd
...........\..............\........\....\testbench
...........\..............\........\....\.........\verilog.asm
...........\..............\........\....\.........\_primary.dat
...........\..............\........\....\.........\_primary.vhd
...........\..............\........\....\_info
...........\..............\........\__projnav
...........\..............\........\.........\alu.ise_created
...........\..............\........\.........\ALU_jhdparse_tcl.rsp
...........\..............\........\.........\alu_tst_wave_createfdo.rsp
...........\..............\........\.........\alu_vlog.gfl
...........\..............\........\.........\jhdparse.log
...........\..............\........\.........\vTOldo_tcl.rsp
...........\..............\........\.........\__synProj.rsp
...........\..............\........\__projnav.log
...........\..............\源文件
...........\..............\......\ALU.V
...........\.......

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