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8051inVHDL

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 159kb
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  • Author :韩***
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Introduction - If you have any usage issues, please Google them yourself
a 8051 VHDL code can be compiled integrity, but it does not guarantee success territory mapping, the microprocessor can be used as a reference design
Packet file list
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8051 in VHDL
............\Behaviour

............\.........\latch373.vhd
............\.........\max232.vhd

............\.........\mc8051.vhd
............\.........\nvsram.vhd
............\.........\pack8051.vhd

............\.........\pwm.vhd
............\.........\segment.vhd
............\.........\serial_unit.vhd
............\.........\sram.hex
............\.........\system.vhd
............\.........\tb.vhd
............\.........\up_motif.gif
............\.........\xs40.vhd
............\index.html
............\Synthesis
............\.........\acc_reg_spec.vhd
............\.........\al_unit_spec.vhd
............\.........\b_sfr_spec.vhd
............\.........\cpu_core_struct.vhd
............\.........\cpu_pack.vhd
............\.........\cpu_pack_body.vhd
............\.........\dptr_reg_generatedInstance.vhd
............\.........\hi_dmem_spec.vhd
............\.........\inter_ctrl_spec.vhd
............\.........\int_hand_spec.vhd
............\.........\ir_decoder_spec.vhd
............\.........\list.txt
............\.........\lo_dmem_spec.vhd
............\.........\mc8051.h
............\.........\mc8051_struct.vhd
............\.........\osc_sm_spec.vhd
............\.........\p0_drv_spec.vhd
............\.........\p1_drv_spec.vhd
............\.........\p2_drv_spec.vhd
............\.........\p3_drv_spec.vhd
............\.........\pc_chg_spec.vhd
............\.........\pc_inc_spec.vhd
............\.........\pmem_reg_spec.vhd
............\.........\prog.txt
............\.........\program_ctrl_struct.vhd
............\.........\prog_ctrl_tb.vhd
............\.........\prog_rom_behav.vhd
............\.........\psw_spec.vhd
............\.........\quickhdl.ini
............\.........\serial_generatedInstance.vhd
............\.........\sp_spec.vhd
............\.........\synth_pack.vhd
............\.........\synth_pack_body.vhd
............\.........\tb.vhd
............\.........\tmp_regs_fsm.vhd
............\.........\vsim.wav
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